hotspot/src/cpu/ppc/vm/nativeInst_ppc.hpp
author goetz
Tue, 07 Jan 2014 17:24:59 +0100
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parent 22861 f5c393d456fc
child 35085 839c8ba29724
permissions -rw-r--r--
8031319: PPC64: Some fixes in ppc and aix coding. Reviewed-by: kvn
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/*
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 * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
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 * Copyright 2012, 2013 SAP AG. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef CPU_PPC_VM_NATIVEINST_PPC_HPP
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#define CPU_PPC_VM_NATIVEINST_PPC_HPP
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#include "asm/assembler.hpp"
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#include "asm/macroAssembler.hpp"
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#include "memory/allocation.hpp"
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#include "runtime/icache.hpp"
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#include "runtime/os.hpp"
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#include "utilities/top.hpp"
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// We have interfaces for the following instructions:
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//
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// - NativeInstruction
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//   - NativeCall
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//   - NativeFarCall
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//   - NativeMovConstReg
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//   - NativeJump
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//   - NativeIllegalInstruction
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//   - NativeConditionalFarBranch
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//   - NativeCallTrampolineStub
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// The base class for different kinds of native instruction abstractions.
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// It provides the primitive operations to manipulate code relative to this.
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class NativeInstruction VALUE_OBJ_CLASS_SPEC {
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  friend class Relocation;
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 public:
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  bool is_sigtrap_ic_miss_check() {
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    assert(UseSIGTRAP, "precondition");
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    return MacroAssembler::is_trap_ic_miss_check(long_at(0));
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  }
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  bool is_sigtrap_null_check() {
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    assert(UseSIGTRAP && TrapBasedNullChecks, "precondition");
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    return MacroAssembler::is_trap_null_check(long_at(0));
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  }
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  // We use a special trap for marking a method as not_entrant or zombie
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  // iff UseSIGTRAP.
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  bool is_sigtrap_zombie_not_entrant() {
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    assert(UseSIGTRAP, "precondition");
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    return MacroAssembler::is_trap_zombie_not_entrant(long_at(0));
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  }
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  // We use an illtrap for marking a method as not_entrant or zombie
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  // iff !UseSIGTRAP.
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  bool is_sigill_zombie_not_entrant() {
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    assert(!UseSIGTRAP, "precondition");
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    // Work around a C++ compiler bug which changes 'this'.
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    return NativeInstruction::is_sigill_zombie_not_entrant_at(addr_at(0));
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  }
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  static bool is_sigill_zombie_not_entrant_at(address addr);
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#ifdef COMPILER2
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  // SIGTRAP-based implicit range checks
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  bool is_sigtrap_range_check() {
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    assert(UseSIGTRAP && TrapBasedRangeChecks, "precondition");
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    return MacroAssembler::is_trap_range_check(long_at(0));
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  }
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#endif
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  // 'should not reach here'.
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  bool is_sigtrap_should_not_reach_here() {
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    return MacroAssembler::is_trap_should_not_reach_here(long_at(0));
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  }
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  bool is_safepoint_poll() {
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    // Is the current instruction a POTENTIAL read access to the polling page?
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    // The current arguments of the instruction are not checked!
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    return MacroAssembler::is_load_from_polling_page(long_at(0), NULL);
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  }
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  bool is_memory_serialization(JavaThread *thread, void *ucontext) {
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    // Is the current instruction a write access of thread to the
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    // memory serialization page?
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    return MacroAssembler::is_memory_serialization(long_at(0), thread, ucontext);
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  }
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  address get_stack_bang_address(void *ucontext) {
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    // If long_at(0) is not a stack bang, return 0. Otherwise, return
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    // banged address.
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    return MacroAssembler::get_stack_bang_address(long_at(0), ucontext);
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  }
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 protected:
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  address  addr_at(int offset) const    { return address(this) + offset; }
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  int      long_at(int offset) const    { return *(int*)addr_at(offset); }
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 public:
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  void verify() NOT_DEBUG_RETURN;
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};
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inline NativeInstruction* nativeInstruction_at(address address) {
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  NativeInstruction* inst = (NativeInstruction*)address;
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  inst->verify();
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  return inst;
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}
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// The NativeCall is an abstraction for accessing/manipulating call
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// instructions. It is used to manipulate inline caches, primitive &
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// dll calls, etc.
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//
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// Sparc distinguishes `NativeCall' and `NativeFarCall'. On PPC64,
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// at present, we provide a single class `NativeCall' representing the
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// sequence `load_const, mtctr, bctrl' or the sequence 'ld_from_toc,
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// mtctr, bctrl'.
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class NativeCall: public NativeInstruction {
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 public:
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  enum ppc_specific_constants {
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    load_const_instruction_size                 = 28,
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    load_const_from_method_toc_instruction_size = 16,
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    instruction_size                            = 16 // Used in shared code for calls with reloc_info.
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  };
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  static bool is_call_at(address a) {
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    return Assembler::is_bl(*(int*)(a));
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  }
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  static bool is_call_before(address return_address) {
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    return NativeCall::is_call_at(return_address - 4);
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  }
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  address instruction_address() const {
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    return addr_at(0);
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  }
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  address next_instruction_address() const {
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    // We have only bl.
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    assert(MacroAssembler::is_bl(*(int*)instruction_address()), "Should be bl instruction!");
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    return addr_at(4);
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  }
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  address return_address() const {
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    return next_instruction_address();
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  }
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  address destination() const;
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  // The parameter assert_lock disables the assertion during code generation.
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  void set_destination_mt_safe(address dest, bool assert_lock = true);
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  address get_trampoline();
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  void verify_alignment() {} // do nothing on ppc
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  void verify() NOT_DEBUG_RETURN;
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};
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inline NativeCall* nativeCall_at(address instr) {
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  NativeCall* call = (NativeCall*)instr;
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  call->verify();
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  return call;
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}
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inline NativeCall* nativeCall_before(address return_address) {
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  NativeCall* call = NULL;
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  if (MacroAssembler::is_bl(*(int*)(return_address - 4)))
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    call = (NativeCall*)(return_address - 4);
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  call->verify();
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  return call;
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}
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// The NativeFarCall is an abstraction for accessing/manipulating native
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// call-anywhere instructions.
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// Used to call native methods which may be loaded anywhere in the address
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// space, possibly out of reach of a call instruction.
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class NativeFarCall: public NativeInstruction {
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 public:
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  // We use MacroAssembler::bl64_patchable() for implementing a
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  // call-anywhere instruction.
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  // Checks whether instr points at a NativeFarCall instruction.
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  static bool is_far_call_at(address instr) {
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    return MacroAssembler::is_bl64_patchable_at(instr);
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  }
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  // Does the NativeFarCall implementation use a pc-relative encoding
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  // of the call destination?
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  // Used when relocating code.
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  bool is_pcrelative() {
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    assert(MacroAssembler::is_bl64_patchable_at((address)this),
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           "unexpected call type");
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    return MacroAssembler::is_bl64_patchable_pcrelative_at((address)this);
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  }
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  // Returns the NativeFarCall's destination.
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  address destination() const {
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    assert(MacroAssembler::is_bl64_patchable_at((address)this),
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           "unexpected call type");
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    return MacroAssembler::get_dest_of_bl64_patchable_at((address)this);
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  }
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  // Sets the NativeCall's destination, not necessarily mt-safe.
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  // Used when relocating code.
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  void set_destination(address dest) {
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    // Set new destination (implementation of call may change here).
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    assert(MacroAssembler::is_bl64_patchable_at((address)this),
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           "unexpected call type");
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    MacroAssembler::set_dest_of_bl64_patchable_at((address)this, dest);
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  }
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  void verify() NOT_DEBUG_RETURN;
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};
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// Instantiates a NativeFarCall object starting at the given instruction
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// address and returns the NativeFarCall object.
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inline NativeFarCall* nativeFarCall_at(address instr) {
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  NativeFarCall* call = (NativeFarCall*)instr;
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  call->verify();
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  return call;
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}
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// An interface for accessing/manipulating native set_oop imm, reg instructions.
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// (used to manipulate inlined data references, etc.)
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class NativeMovConstReg: public NativeInstruction {
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 public:
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  enum ppc_specific_constants {
22824
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    load_const_instruction_size                 = 20,
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    load_const_from_method_toc_instruction_size =  8,
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    instruction_size                            =  8 // Used in shared code for calls with reloc_info.
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  };
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  address instruction_address() const {
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    return addr_at(0);
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  }
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  address next_instruction_address() const;
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  // (The [set_]data accessor respects oop_type relocs also.)
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  intptr_t data() const;
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  // Patch the code stream.
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  address set_data_plain(intptr_t x, CodeBlob *code);
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  // Patch the code stream and oop pool.
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  void set_data(intptr_t x);
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  // Patch narrow oop constants. Use this also for narrow klass.
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  void set_narrow_oop(narrowOop data, CodeBlob *code = NULL);
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  void verify() NOT_DEBUG_RETURN;
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};
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inline NativeMovConstReg* nativeMovConstReg_at(address address) {
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  NativeMovConstReg* test = (NativeMovConstReg*)address;
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  test->verify();
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  return test;
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}
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// The NativeJump is an abstraction for accessing/manipulating native
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// jump-anywhere instructions.
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class NativeJump: public NativeInstruction {
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 public:
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  // We use MacroAssembler::b64_patchable() for implementing a
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  // jump-anywhere instruction.
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  enum ppc_specific_constants {
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    instruction_size = MacroAssembler::b64_patchable_size
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  };
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  // Checks whether instr points at a NativeJump instruction.
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  static bool is_jump_at(address instr) {
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    return MacroAssembler::is_b64_patchable_at(instr)
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      || (   MacroAssembler::is_load_const_from_method_toc_at(instr)
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          && Assembler::is_mtctr(*(int*)(instr + 2 * 4))
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          && Assembler::is_bctr(*(int*)(instr + 3 * 4)));
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  }
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  // Does the NativeJump implementation use a pc-relative encoding
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  // of the call destination?
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  // Used when relocating code or patching jumps.
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  bool is_pcrelative() {
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    return MacroAssembler::is_b64_patchable_pcrelative_at((address)this);
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  }
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  // Returns the NativeJump's destination.
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  address jump_destination() const {
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    if (MacroAssembler::is_b64_patchable_at((address)this)) {
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      return MacroAssembler::get_dest_of_b64_patchable_at((address)this);
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    } else if (MacroAssembler::is_load_const_from_method_toc_at((address)this)
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               && Assembler::is_mtctr(*(int*)((address)this + 2 * 4))
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               && Assembler::is_bctr(*(int*)((address)this + 3 * 4))) {
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      return (address)((NativeMovConstReg *)this)->data();
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    } else {
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      ShouldNotReachHere();
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      return NULL;
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    }
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  }
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  // Sets the NativeJump's destination, not necessarily mt-safe.
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  // Used when relocating code or patching jumps.
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  void set_jump_destination(address dest) {
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    // Set new destination (implementation of call may change here).
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    if (MacroAssembler::is_b64_patchable_at((address)this)) {
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      MacroAssembler::set_dest_of_b64_patchable_at((address)this, dest);
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    } else if (MacroAssembler::is_load_const_from_method_toc_at((address)this)
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               && Assembler::is_mtctr(*(int*)((address)this + 2 * 4))
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               && Assembler::is_bctr(*(int*)((address)this + 3 * 4))) {
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      ((NativeMovConstReg *)this)->set_data((intptr_t)dest);
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    } else {
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      ShouldNotReachHere();
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    }
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  }
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  // MT-safe insertion of native jump at verified method entry
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  static void patch_verified_entry(address entry, address verified_entry, address dest);
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  void verify() NOT_DEBUG_RETURN;
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  static void check_verified_entry_alignment(address entry, address verified_entry) {
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    // We just patch one instruction on ppc64, so the jump doesn't have to
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    // be aligned. Nothing to do here.
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  }
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};
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// Instantiates a NativeJump object starting at the given instruction
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// address and returns the NativeJump object.
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inline NativeJump* nativeJump_at(address instr) {
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  NativeJump* call = (NativeJump*)instr;
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  call->verify();
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  return call;
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}
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// NativeConditionalFarBranch is abstraction for accessing/manipulating
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// conditional far branches.
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class NativeConditionalFarBranch : public NativeInstruction {
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 public:
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  static bool is_conditional_far_branch_at(address instr) {
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    return MacroAssembler::is_bc_far_at(instr);
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  }
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  address branch_destination() const {
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    return MacroAssembler::get_dest_of_bc_far_at((address)this);
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  }
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  void set_branch_destination(address dest) {
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    MacroAssembler::set_dest_of_bc_far_at((address)this, dest);
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  }
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};
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inline NativeConditionalFarBranch* NativeConditionalFarBranch_at(address address) {
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  assert(NativeConditionalFarBranch::is_conditional_far_branch_at(address),
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         "must be a conditional far branch");
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  return (NativeConditionalFarBranch*)address;
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}
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// Call trampoline stubs.
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class NativeCallTrampolineStub : public NativeInstruction {
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 private:
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  address encoded_destination_addr() const;
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 public:
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  address destination(nmethod *nm = NULL) const;
22824
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  int destination_toc_offset() const;
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  void set_destination(address new_destination);
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};
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   386
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inline bool is_NativeCallTrampolineStub_at(address address) {
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  int first_instr = *(int*)address;
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  return Assembler::is_addis(first_instr) &&
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    (Register)(intptr_t)Assembler::inv_rt_field(first_instr) == R12_scratch2;
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}
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inline NativeCallTrampolineStub* NativeCallTrampolineStub_at(address address) {
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  assert(is_NativeCallTrampolineStub_at(address), "no call trampoline found");
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  return (NativeCallTrampolineStub*)address;
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   396
}
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#endif // CPU_PPC_VM_NATIVEINST_PPC_HPP