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/*
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* Copyright 1998-2007 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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#include "incls/_precompiled.incl"
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#include "incls/_postaloc.cpp.incl"
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// see if this register kind does not requires two registers
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static bool is_single_register(uint x) {
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#ifdef _LP64
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return (x != Op_RegD && x != Op_RegL && x != Op_RegP);
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#else
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return (x != Op_RegD && x != Op_RegL);
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#endif
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}
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//------------------------------may_be_copy_of_callee-----------------------------
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// Check to see if we can possibly be a copy of a callee-save value.
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bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
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// Short circuit if there are no callee save registers
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if (_matcher.number_of_saved_registers() == 0) return false;
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// Expect only a spill-down and reload on exit for callee-save spills.
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// Chains of copies cannot be deep.
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// 5008997 - This is wishful thinking. Register allocator seems to
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// be splitting live ranges for callee save registers to such
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// an extent that in large methods the chains can be very long
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// (50+). The conservative answer is to return true if we don't
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// know as this prevents optimizations from occuring.
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const int limit = 60;
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int i;
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for( i=0; i < limit; i++ ) {
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if( def->is_Proj() && def->in(0)->is_Start() &&
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_matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) )
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return true; // Direct use of callee-save proj
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if( def->is_Copy() ) // Copies carry value through
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def = def->in(def->is_Copy());
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else if( def->is_Phi() ) // Phis can merge it from any direction
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def = def->in(1);
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else
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break;
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guarantee(def != NULL, "must not resurrect dead copy");
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}
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// If we reached the end and didn't find a callee save proj
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// then this may be a callee save proj so we return true
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// as the conservative answer. If we didn't reach then end
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// we must have discovered that it was not a callee save
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// else we would have returned.
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return i == limit;
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}
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//------------------------------yank_if_dead-----------------------------------
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// Removed an edge from 'old'. Yank if dead. Return adjustment counts to
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// iterators in the current block.
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int PhaseChaitin::yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
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int blk_adjust=0;
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while (old->outcnt() == 0 && old != C->top()) {
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Block *oldb = _cfg._bbs[old->_idx];
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oldb->find_remove(old);
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// Count 1 if deleting an instruction from the current block
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if( oldb == current_block ) blk_adjust++;
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_cfg._bbs.map(old->_idx,NULL);
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OptoReg::Name old_reg = lrgs(n2lidx(old)).reg();
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if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
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value->map(old_reg,NULL); // Yank from value/regnd maps
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regnd->map(old_reg,NULL); // This register's value is now unknown
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}
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Node *tmp = old->req() > 1 ? old->in(1) : NULL;
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old->disconnect_inputs(NULL);
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if( !tmp ) break;
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old = tmp;
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}
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return blk_adjust;
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}
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//------------------------------use_prior_register-----------------------------
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// Use the prior value instead of the current value, in an effort to make
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// the current value go dead. Return block iterator adjustment, in case
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// we yank some instructions from this block.
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int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) {
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// No effect?
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if( def == n->in(idx) ) return 0;
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// Def is currently dead and can be removed? Do not resurrect
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if( def->outcnt() == 0 ) return 0;
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// Not every pair of physical registers are assignment compatible,
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// e.g. on sparc floating point registers are not assignable to integer
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// registers.
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const LRG &def_lrg = lrgs(n2lidx(def));
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OptoReg::Name def_reg = def_lrg.reg();
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const RegMask &use_mask = n->in_RegMask(idx);
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bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
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: (use_mask.is_AllStack() != 0));
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// Check for a copy to or from a misaligned pair.
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can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair();
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if (!can_use)
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return 0;
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// Capture the old def in case it goes dead...
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Node *old = n->in(idx);
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// Save-on-call copies can only be elided if the entire copy chain can go
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// away, lest we get the same callee-save value alive in 2 locations at
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// once. We check for the obvious trivial case here. Although it can
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// sometimes be elided with cooperation outside our scope, here we will just
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// miss the opportunity. :-(
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if( may_be_copy_of_callee(def) ) {
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if( old->outcnt() > 1 ) return 0; // We're the not last user
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int idx = old->is_Copy();
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assert( idx, "chain of copies being removed" );
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Node *old2 = old->in(idx); // Chain of copies
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if( old2->outcnt() > 1 ) return 0; // old is not the last user
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int idx2 = old2->is_Copy();
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if( !idx2 ) return 0; // Not a chain of 2 copies
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if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
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}
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// Use the new def
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n->set_req(idx,def);
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_post_alloc++;
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// Is old def now dead? We successfully yanked a copy?
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return yank_if_dead(old,current_block,&value,®nd);
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}
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//------------------------------skip_copies------------------------------------
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// Skip through any number of copies (that don't mod oop-i-ness)
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Node *PhaseChaitin::skip_copies( Node *c ) {
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int idx = c->is_Copy();
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uint is_oop = lrgs(n2lidx(c))._is_oop;
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while (idx != 0) {
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guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
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if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop)
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break; // casting copy, not the same value
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c = c->in(idx);
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idx = c->is_Copy();
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}
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return c;
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}
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//------------------------------elide_copy-------------------------------------
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// Remove (bypass) copies along Node n, edge k.
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int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) {
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int blk_adjust = 0;
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uint nk_idx = n2lidx(n->in(k));
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OptoReg::Name nk_reg = lrgs(nk_idx ).reg();
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// Remove obvious same-register copies
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Node *x = n->in(k);
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int idx;
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while( (idx=x->is_Copy()) != 0 ) {
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Node *copy = x->in(idx);
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guarantee(copy != NULL, "must not resurrect dead copy");
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if( lrgs(n2lidx(copy)).reg() != nk_reg ) break;
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blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
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if( n->in(k) != copy ) break; // Failed for some cutout?
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x = copy; // Progress, try again
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}
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// Phis and 2-address instructions cannot change registers so easily - their
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// outputs must match their input.
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if( !can_change_regs )
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return blk_adjust; // Only check stupid copies!
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// Loop backedges won't have a value-mapping yet
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if( &value == NULL ) return blk_adjust;
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// Skip through all copies to the _value_ being used. Do not change from
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// int to pointer. This attempts to jump through a chain of copies, where
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// intermediate copies might be illegal, i.e., value is stored down to stack
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// then reloaded BUT survives in a register the whole way.
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Node *val = skip_copies(n->in(k));
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if( val == x ) return blk_adjust; // No progress?
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bool single = is_single_register(val->ideal_reg());
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uint val_idx = n2lidx(val);
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OptoReg::Name val_reg = lrgs(val_idx).reg();
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// See if it happens to already be in the correct register!
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// (either Phi's direct register, or the common case of the name
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// never-clobbered original-def register)
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if( value[val_reg] == val &&
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// Doubles check both halves
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( single || value[val_reg-1] == val ) ) {
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blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
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if( n->in(k) == regnd[val_reg] ) // Success! Quit trying
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return blk_adjust;
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}
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// See if we can skip the copy by changing registers. Don't change from
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// using a register to using the stack unless we know we can remove a
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// copy-load. Otherwise we might end up making a pile of Intel cisc-spill
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// ops reading from memory instead of just loading once and using the
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// register.
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// Also handle duplicate copies here.
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const Type *t = val->is_Con() ? val->bottom_type() : NULL;
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// Scan all registers to see if this value is around already
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for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
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Node *vv = value[reg];
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if( !single ) { // Doubles check for aligned-adjacent pair
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if( (reg&1)==0 ) continue; // Wrong half of a pair
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if( vv != value[reg-1] ) continue; // Not a complete pair
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}
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if( vv == val || // Got a direct hit?
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(t && vv && vv->bottom_type() == t && vv->is_Mach() &&
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vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
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assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
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if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
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OptoReg::is_reg(reg) || // turning into a register use OR
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regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
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blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
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if( n->in(k) == regnd[reg] ) // Success! Quit trying
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return blk_adjust;
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} // End of if not degrading to a stack
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} // End of if found value in another register
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} // End of scan all machine registers
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return blk_adjust;
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}
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//
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// Check if nreg already contains the constant value val. Normal copy
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// elimination doesn't doesn't work on constants because multiple
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// nodes can represent the same constant so the type and rule of the
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// MachNode must be checked to ensure equivalence.
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//
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bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Block *current_block,
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Node_List& value, Node_List& regnd,
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OptoReg::Name nreg, OptoReg::Name nreg2) {
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if (value[nreg] != val && val->is_Con() &&
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value[nreg] != NULL && value[nreg]->is_Con() &&
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(nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
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value[nreg]->bottom_type() == val->bottom_type() &&
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value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
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// This code assumes that two MachNodes representing constants
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// which have the same rule and the same bottom type will produce
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// identical effects into a register. This seems like it must be
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// objectively true unless there are hidden inputs to the nodes
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// but if that were to change this code would need to updated.
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// Since they are equivalent the second one if redundant and can
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// be removed.
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//
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// val will be replaced with the old value but val might have
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// kills projections associated with it so remove them now so that
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// yank_if_dead will be able to elminate the copy once the uses
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// have been transferred to the old[value].
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for (DUIterator_Fast imax, i = val->fast_outs(imax); i < imax; i++) {
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Node* use = val->fast_out(i);
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if (use->is_Proj() && use->outcnt() == 0) {
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// Kill projections have no users and one input
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use->set_req(0, C->top());
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yank_if_dead(use, current_block, &value, ®nd);
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--i; --imax;
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}
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}
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_post_alloc++;
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return true;
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}
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return false;
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}
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//------------------------------post_allocate_copy_removal---------------------
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// Post-Allocation peephole copy removal. We do this in 1 pass over the
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// basic blocks. We maintain a mapping of registers to Nodes (an array of
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// Nodes indexed by machine register or stack slot number). NULL means that a
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// register is not mapped to any Node. We can (want to have!) have several
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// registers map to the same Node. We walk forward over the instructions
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// updating the mapping as we go. At merge points we force a NULL if we have
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// to merge 2 different Nodes into the same register. Phi functions will give
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// us a new Node if there is a proper value merging. Since the blocks are
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// arranged in some RPO, we will visit all parent blocks before visiting any
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// successor blocks (except at loops).
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//
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// If we find a Copy we look to see if the Copy's source register is a stack
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// slot and that value has already been loaded into some machine register; if
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// so we use machine register directly. This turns a Load into a reg-reg
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// Move. We also look for reloads of identical constants.
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//
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// When we see a use from a reg-reg Copy, we will attempt to use the copy's
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// source directly and make the copy go dead.
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void PhaseChaitin::post_allocate_copy_removal() {
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NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
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ResourceMark rm;
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// Need a mapping from basic block Node_Lists. We need a Node_List to
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// map from register number to value-producing Node.
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Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
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memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
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// Need a mapping from basic block Node_Lists. We need a Node_List to
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// map from register number to register-defining Node.
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Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
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memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
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// We keep unused Node_Lists on a free_list to avoid wasting
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// memory.
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GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
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// For all blocks
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for( uint i = 0; i < _cfg._num_blocks; i++ ) {
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uint j;
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Block *b = _cfg._blocks[i];
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// Count of Phis in block
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uint phi_dex;
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for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
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Node *phi = b->_nodes[phi_dex];
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if( !phi->is_Phi() )
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break;
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}
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// If any predecessor has not been visited, we do not know the state
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// of registers at the start. Check for this, while updating copies
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// along Phi input edges
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bool missing_some_inputs = false;
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Block *freed = NULL;
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for( j = 1; j < b->num_preds(); j++ ) {
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Block *pb = _cfg._bbs[b->pred(j)->_idx];
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// Remove copies along phi edges
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for( uint k=1; k<phi_dex; k++ )
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|
350 |
elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
|
|
351 |
if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
|
|
352 |
// See if this predecessor's mappings have been used by everybody
|
|
353 |
// who wants them. If so, free 'em.
|
|
354 |
uint k;
|
|
355 |
for( k=0; k<pb->_num_succs; k++ ) {
|
|
356 |
Block *pbsucc = pb->_succs[k];
|
|
357 |
if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
|
|
358 |
break; // Found a future user
|
|
359 |
}
|
|
360 |
if( k >= pb->_num_succs ) { // No more uses, free!
|
|
361 |
freed = pb; // Record last block freed
|
|
362 |
free_list.push(blk2value[pb->_pre_order]);
|
|
363 |
free_list.push(blk2regnd[pb->_pre_order]);
|
|
364 |
}
|
|
365 |
} else { // This block has unvisited (loopback) inputs
|
|
366 |
missing_some_inputs = true;
|
|
367 |
}
|
|
368 |
}
|
|
369 |
|
|
370 |
|
|
371 |
// Extract Node_List mappings. If 'freed' is non-zero, we just popped
|
|
372 |
// 'freed's blocks off the list
|
|
373 |
Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
|
|
374 |
Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
|
|
375 |
assert( !freed || blk2value[freed->_pre_order] == &value, "" );
|
|
376 |
value.map(_max_reg,NULL);
|
|
377 |
regnd.map(_max_reg,NULL);
|
|
378 |
// Set mappings as OUR mappings
|
|
379 |
blk2value[b->_pre_order] = &value;
|
|
380 |
blk2regnd[b->_pre_order] = ®nd;
|
|
381 |
|
|
382 |
// Initialize value & regnd for this block
|
|
383 |
if( missing_some_inputs ) {
|
|
384 |
// Some predecessor has not yet been visited; zap map to empty
|
|
385 |
for( uint k = 0; k < (uint)_max_reg; k++ ) {
|
|
386 |
value.map(k,NULL);
|
|
387 |
regnd.map(k,NULL);
|
|
388 |
}
|
|
389 |
} else {
|
|
390 |
if( !freed ) { // Didn't get a freebie prior block
|
|
391 |
// Must clone some data
|
|
392 |
freed = _cfg._bbs[b->pred(1)->_idx];
|
|
393 |
Node_List &f_value = *blk2value[freed->_pre_order];
|
|
394 |
Node_List &f_regnd = *blk2regnd[freed->_pre_order];
|
|
395 |
for( uint k = 0; k < (uint)_max_reg; k++ ) {
|
|
396 |
value.map(k,f_value[k]);
|
|
397 |
regnd.map(k,f_regnd[k]);
|
|
398 |
}
|
|
399 |
}
|
|
400 |
// Merge all inputs together, setting to NULL any conflicts.
|
|
401 |
for( j = 1; j < b->num_preds(); j++ ) {
|
|
402 |
Block *pb = _cfg._bbs[b->pred(j)->_idx];
|
|
403 |
if( pb == freed ) continue; // Did self already via freelist
|
|
404 |
Node_List &p_regnd = *blk2regnd[pb->_pre_order];
|
|
405 |
for( uint k = 0; k < (uint)_max_reg; k++ ) {
|
|
406 |
if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
|
|
407 |
value.map(k,NULL); // Then no value handy
|
|
408 |
regnd.map(k,NULL);
|
|
409 |
}
|
|
410 |
}
|
|
411 |
}
|
|
412 |
}
|
|
413 |
|
|
414 |
// For all Phi's
|
|
415 |
for( j = 1; j < phi_dex; j++ ) {
|
|
416 |
uint k;
|
|
417 |
Node *phi = b->_nodes[j];
|
|
418 |
uint pidx = n2lidx(phi);
|
|
419 |
OptoReg::Name preg = lrgs(n2lidx(phi)).reg();
|
|
420 |
|
|
421 |
// Remove copies remaining on edges. Check for junk phi.
|
|
422 |
Node *u = NULL;
|
|
423 |
for( k=1; k<phi->req(); k++ ) {
|
|
424 |
Node *x = phi->in(k);
|
|
425 |
if( phi != x && u != x ) // Found a different input
|
|
426 |
u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
|
|
427 |
}
|
|
428 |
if( u != NodeSentinel ) { // Junk Phi. Remove
|
|
429 |
b->_nodes.remove(j--); phi_dex--;
|
|
430 |
_cfg._bbs.map(phi->_idx,NULL);
|
|
431 |
phi->replace_by(u);
|
|
432 |
phi->disconnect_inputs(NULL);
|
|
433 |
continue;
|
|
434 |
}
|
|
435 |
// Note that if value[pidx] exists, then we merged no new values here
|
|
436 |
// and the phi is useless. This can happen even with the above phi
|
|
437 |
// removal for complex flows. I cannot keep the better known value here
|
|
438 |
// because locally the phi appears to define a new merged value. If I
|
|
439 |
// keep the better value then a copy of the phi, being unable to use the
|
|
440 |
// global flow analysis, can't "peek through" the phi to the original
|
|
441 |
// reaching value and so will act like it's defining a new value. This
|
|
442 |
// can lead to situations where some uses are from the old and some from
|
|
443 |
// the new values. Not illegal by itself but throws the over-strong
|
|
444 |
// assert in scheduling.
|
|
445 |
if( pidx ) {
|
|
446 |
value.map(preg,phi);
|
|
447 |
regnd.map(preg,phi);
|
|
448 |
OptoReg::Name preg_lo = OptoReg::add(preg,-1);
|
|
449 |
if( !is_single_register(phi->ideal_reg()) ) {
|
|
450 |
value.map(preg_lo,phi);
|
|
451 |
regnd.map(preg_lo,phi);
|
|
452 |
}
|
|
453 |
}
|
|
454 |
}
|
|
455 |
|
|
456 |
// For all remaining instructions
|
|
457 |
for( j = phi_dex; j < b->_nodes.size(); j++ ) {
|
|
458 |
Node *n = b->_nodes[j];
|
|
459 |
|
|
460 |
if( n->outcnt() == 0 && // Dead?
|
|
461 |
n != C->top() && // (ignore TOP, it has no du info)
|
|
462 |
!n->is_Proj() ) { // fat-proj kills
|
|
463 |
j -= yank_if_dead(n,b,&value,®nd);
|
|
464 |
continue;
|
|
465 |
}
|
|
466 |
|
|
467 |
// Improve reaching-def info. Occasionally post-alloc's liveness gives
|
|
468 |
// up (at loop backedges, because we aren't doing a full flow pass).
|
|
469 |
// The presence of a live use essentially asserts that the use's def is
|
|
470 |
// alive and well at the use (or else the allocator fubar'd). Take
|
|
471 |
// advantage of this info to set a reaching def for the use-reg.
|
|
472 |
uint k;
|
|
473 |
for( k = 1; k < n->req(); k++ ) {
|
|
474 |
Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE
|
|
475 |
guarantee(def != NULL, "no disconnected nodes at this point");
|
|
476 |
uint useidx = n2lidx(def); // useidx is the live range index for this USE
|
|
477 |
|
|
478 |
if( useidx ) {
|
|
479 |
OptoReg::Name ureg = lrgs(useidx).reg();
|
|
480 |
if( !value[ureg] ) {
|
|
481 |
int idx; // Skip occasional useless copy
|
|
482 |
while( (idx=def->is_Copy()) != 0 &&
|
|
483 |
def->in(idx) != NULL && // NULL should not happen
|
|
484 |
ureg == lrgs(n2lidx(def->in(idx))).reg() )
|
|
485 |
def = def->in(idx);
|
|
486 |
Node *valdef = skip_copies(def); // tighten up val through non-useless copies
|
|
487 |
value.map(ureg,valdef); // record improved reaching-def info
|
|
488 |
regnd.map(ureg, def);
|
|
489 |
// Record other half of doubles
|
|
490 |
OptoReg::Name ureg_lo = OptoReg::add(ureg,-1);
|
|
491 |
if( !is_single_register(def->ideal_reg()) &&
|
|
492 |
( !RegMask::can_represent(ureg_lo) ||
|
|
493 |
lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent
|
|
494 |
!value[ureg_lo] ) {
|
|
495 |
value.map(ureg_lo,valdef); // record improved reaching-def info
|
|
496 |
regnd.map(ureg_lo, def);
|
|
497 |
}
|
|
498 |
}
|
|
499 |
}
|
|
500 |
}
|
|
501 |
|
|
502 |
const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
|
|
503 |
|
|
504 |
// Remove copies along input edges
|
|
505 |
for( k = 1; k < n->req(); k++ )
|
|
506 |
j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
|
|
507 |
|
|
508 |
// Unallocated Nodes define no registers
|
|
509 |
uint lidx = n2lidx(n);
|
|
510 |
if( !lidx ) continue;
|
|
511 |
|
|
512 |
// Update the register defined by this instruction
|
|
513 |
OptoReg::Name nreg = lrgs(lidx).reg();
|
|
514 |
// Skip through all copies to the _value_ being defined.
|
|
515 |
// Do not change from int to pointer
|
|
516 |
Node *val = skip_copies(n);
|
|
517 |
|
|
518 |
uint n_ideal_reg = n->ideal_reg();
|
|
519 |
if( is_single_register(n_ideal_reg) ) {
|
|
520 |
// If Node 'n' does not change the value mapped by the register,
|
|
521 |
// then 'n' is a useless copy. Do not update the register->node
|
|
522 |
// mapping so 'n' will go dead.
|
|
523 |
if( value[nreg] != val ) {
|
|
524 |
if (eliminate_copy_of_constant(val, b, value, regnd, nreg, OptoReg::Bad)) {
|
|
525 |
n->replace_by(regnd[nreg]);
|
|
526 |
j -= yank_if_dead(n,b,&value,®nd);
|
|
527 |
} else {
|
|
528 |
// Update the mapping: record new Node defined by the register
|
|
529 |
regnd.map(nreg,n);
|
|
530 |
// Update mapping for defined *value*, which is the defined
|
|
531 |
// Node after skipping all copies.
|
|
532 |
value.map(nreg,val);
|
|
533 |
}
|
|
534 |
} else if( !may_be_copy_of_callee(n) && regnd[nreg]->outcnt() != 0 ) {
|
|
535 |
assert( n->is_Copy(), "" );
|
|
536 |
n->replace_by(regnd[nreg]);
|
|
537 |
j -= yank_if_dead(n,b,&value,®nd);
|
|
538 |
}
|
|
539 |
} else {
|
|
540 |
// If the value occupies a register pair, record same info
|
|
541 |
// in both registers.
|
|
542 |
OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
|
|
543 |
if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or
|
|
544 |
!lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
|
|
545 |
// Sparc occasionally has non-adjacent pairs.
|
|
546 |
// Find the actual other value
|
|
547 |
RegMask tmp = lrgs(lidx).mask();
|
|
548 |
tmp.Remove(nreg);
|
|
549 |
nreg_lo = tmp.find_first_elem();
|
|
550 |
}
|
|
551 |
if( value[nreg] != val || value[nreg_lo] != val ) {
|
|
552 |
if (eliminate_copy_of_constant(n, b, value, regnd, nreg, nreg_lo)) {
|
|
553 |
n->replace_by(regnd[nreg]);
|
|
554 |
j -= yank_if_dead(n,b,&value,®nd);
|
|
555 |
} else {
|
|
556 |
regnd.map(nreg , n );
|
|
557 |
regnd.map(nreg_lo, n );
|
|
558 |
value.map(nreg ,val);
|
|
559 |
value.map(nreg_lo,val);
|
|
560 |
}
|
|
561 |
} else if( !may_be_copy_of_callee(n) && regnd[nreg]->outcnt() != 0 ) {
|
|
562 |
assert( n->is_Copy(), "" );
|
|
563 |
n->replace_by(regnd[nreg]);
|
|
564 |
j -= yank_if_dead(n,b,&value,®nd);
|
|
565 |
}
|
|
566 |
}
|
|
567 |
|
|
568 |
// Fat projections kill many registers
|
|
569 |
if( n_ideal_reg == MachProjNode::fat_proj ) {
|
|
570 |
RegMask rm = n->out_RegMask();
|
|
571 |
// wow, what an expensive iterator...
|
|
572 |
nreg = rm.find_first_elem();
|
|
573 |
while( OptoReg::is_valid(nreg)) {
|
|
574 |
rm.Remove(nreg);
|
|
575 |
value.map(nreg,n);
|
|
576 |
regnd.map(nreg,n);
|
|
577 |
nreg = rm.find_first_elem();
|
|
578 |
}
|
|
579 |
}
|
|
580 |
|
|
581 |
} // End of for all instructions in the block
|
|
582 |
|
|
583 |
} // End for all blocks
|
|
584 |
}
|