/*

 * Copyright 2003-2007 Sun Microsystems, Inc.  All Rights Reserved.

 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

 *

 * This code is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 only, as

 * published by the Free Software Foundation.

 *

 * This code is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * version 2 for more details (a copy is included in the LICENSE file that

 * accompanied this code).

 *

 * You should have received a copy of the GNU General Public License version

 * 2 along with this work; if not, write to the Free Software Foundation,

 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

 *

 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,

 * CA 95054 USA or visit www.sun.com if you need additional information or

 * have any questions.

 *

 */

#include "incls/_precompiled.incl"

#include "incls/_assembler_x86_64.cpp.incl"

// Implementation of AddressLiteral

AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) {

  _is_lval = false;

  _target = target;

  switch (rtype) {

  case relocInfo::oop_type:

    // Oops are a special case. Normally they would be their own section

    // but in cases like icBuffer they are literals in the code stream that

    // we don't have a section for. We use none so that we get a literal address

    // which is always patchable.

    break;

  case relocInfo::external_word_type:

    _rspec = external_word_Relocation::spec(target);

    break;

  case relocInfo::internal_word_type:

    _rspec = internal_word_Relocation::spec(target);

    break;

  case relocInfo::opt_virtual_call_type:

    _rspec = opt_virtual_call_Relocation::spec();

    break;

  case relocInfo::static_call_type:

    _rspec = static_call_Relocation::spec();

    break;

  case relocInfo::runtime_call_type:

    _rspec = runtime_call_Relocation::spec();

    break;

  case relocInfo::none:

    break;

  default:

    ShouldNotReachHere();

    break;

  }

}

// Implementation of Address

Address Address::make_array(ArrayAddress adr) {

#ifdef _LP64

  // Not implementable on 64bit machines

  // Should have been handled higher up the call chain.

  ShouldNotReachHere();

  return Address();

#else

  AddressLiteral base = adr.base();

  Address index = adr.index();

  assert(index._disp == 0, "must not have disp"); // maybe it can?

  Address array(index._base, index._index, index._scale, (intptr_t) base.target());

  array._rspec = base._rspec;

  return array;

#endif // _LP64

}

// exceedingly dangerous constructor

Address::Address(int disp, address loc, relocInfo::relocType rtype) {

  _base  = noreg;

  _index = noreg;

  _scale = no_scale;

  _disp  = disp;

  switch (rtype) {

    case relocInfo::external_word_type:

      _rspec = external_word_Relocation::spec(loc);

      break;

    case relocInfo::internal_word_type:

      _rspec = internal_word_Relocation::spec(loc);

      break;

    case relocInfo::runtime_call_type:

      // HMM

      _rspec = runtime_call_Relocation::spec();

      break;

    case relocInfo::none:

      break;

    default:

      ShouldNotReachHere();

  }

}

// Convert the raw encoding form into the form expected by the constructor for

// Address.  An index of 4 (rsp) corresponds to having no index, so convert

// that to noreg for the Address constructor.

Address Address::make_raw(int base, int index, int scale, int disp) {

  bool valid_index = index != rsp->encoding();

  if (valid_index) {

    Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp));

    return madr;

  } else {

    Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp));

    return madr;

  }

}

// Implementation of Assembler

int AbstractAssembler::code_fill_byte() {

  return (u_char)'\xF4'; // hlt

}

// This should only be used by 64bit instructions that can use rip-relative

// it cannot be used by instructions that want an immediate value.

bool Assembler::reachable(AddressLiteral adr) {

  int64_t disp;

  // None will force a 64bit literal to the code stream. Likely a placeholder

  // for something that will be patched later and we need to certain it will

  // always be reachable.

  if (adr.reloc() == relocInfo::none) {

    return false;

  }

  if (adr.reloc() == relocInfo::internal_word_type) {

    // This should be rip relative and easily reachable.

    return true;

  }

  if (adr.reloc() != relocInfo::external_word_type &&

      adr.reloc() != relocInfo::runtime_call_type ) {

    return false;

  }

  // Stress the correction code

  if (ForceUnreachable) {

    // Must be runtimecall reloc, see if it is in the codecache

    // Flipping stuff in the codecache to be unreachable causes issues

    // with things like inline caches where the additional instructions

    // are not handled.

    if (CodeCache::find_blob(adr._target) == NULL) {

      return false;

    }

  }

  // For external_word_type/runtime_call_type if it is reachable from where we

  // are now (possibly a temp buffer) and where we might end up

  // anywhere in the codeCache then we are always reachable.

  // This would have to change if we ever save/restore shared code

  // to be more pessimistic.

  disp = (int64_t)adr._target - ((int64_t)CodeCache::low_bound() + sizeof(int));

  if (!is_simm32(disp)) return false;

  disp = (int64_t)adr._target - ((int64_t)CodeCache::high_bound() + sizeof(int));

  if (!is_simm32(disp)) return false;

  disp = (int64_t)adr._target - ((int64_t)_code_pos + sizeof(int));

  // Because rip relative is a disp + address_of_next_instruction and we

  // don't know the value of address_of_next_instruction we apply a fudge factor

  // to make sure we will be ok no matter the size of the instruction we get placed into.

  // We don't have to fudge the checks above here because they are already worst case.

  // 12 == override/rex byte, opcode byte, rm byte, sib byte, a 4-byte disp , 4-byte literal

  // + 4 because better safe than sorry.

  const int fudge = 12 + 4;

  if (disp < 0) {

    disp -= fudge;

  } else {

    disp += fudge;

  }

  return is_simm32(disp);

}

// make this go away eventually

void Assembler::emit_data(jint data,

                          relocInfo::relocType rtype,

                          int format) {

  if (rtype == relocInfo::none) {

    emit_long(data);

  } else {

    emit_data(data, Relocation::spec_simple(rtype), format);

  }

}

void Assembler::emit_data(jint data,

                          RelocationHolder const& rspec,

                          int format) {

  assert(imm64_operand == 0, "default format must be imm64 in this file");

  assert(imm64_operand != format, "must not be imm64");

  assert(inst_mark() != NULL, "must be inside InstructionMark");

  if (rspec.type() !=  relocInfo::none) {

    #ifdef ASSERT

      check_relocation(rspec, format);

    #endif

    // Do not use AbstractAssembler::relocate, which is not intended for

    // embedded words.  Instead, relocate to the enclosing instruction.

    // hack. call32 is too wide for mask so use disp32

    if (format == call32_operand)

      code_section()->relocate(inst_mark(), rspec, disp32_operand);

    else

      code_section()->relocate(inst_mark(), rspec, format);

  }

  emit_long(data);

}

void Assembler::emit_data64(jlong data,

                            relocInfo::relocType rtype,

                            int format) {

  if (rtype == relocInfo::none) {

    emit_long64(data);

  } else {

    emit_data64(data, Relocation::spec_simple(rtype), format);

  }

}

void Assembler::emit_data64(jlong data,

                            RelocationHolder const& rspec,

                            int format) {

  assert(imm64_operand == 0, "default format must be imm64 in this file");

  assert(imm64_operand == format, "must be imm64");

  assert(inst_mark() != NULL, "must be inside InstructionMark");

  // Do not use AbstractAssembler::relocate, which is not intended for

  // embedded words.  Instead, relocate to the enclosing instruction.

  code_section()->relocate(inst_mark(), rspec, format);

#ifdef ASSERT

  check_relocation(rspec, format);

#endif

  emit_long64(data);

}

void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) {

  assert(isByte(op1) && isByte(op2), "wrong opcode");

  assert(isByte(imm8), "not a byte");

  assert((op1 & 0x01) == 0, "should be 8bit operation");

  int dstenc = dst->encoding();

  if (dstenc >= 8) {

    dstenc -= 8;

  }

  emit_byte(op1);

  emit_byte(op2 | dstenc);

  emit_byte(imm8);

}

void Assembler::emit_arith(int op1, int op2, Register dst, int imm32) {

  assert(isByte(op1) && isByte(op2), "wrong opcode");

  assert((op1 & 0x01) == 1, "should be 32bit operation");

  assert((op1 & 0x02) == 0, "sign-extension bit should not be set");

  int dstenc = dst->encoding();

  if (dstenc >= 8) {

    dstenc -= 8;

  }

  if (is8bit(imm32)) {

    emit_byte(op1 | 0x02); // set sign bit

    emit_byte(op2 | dstenc);

    emit_byte(imm32 & 0xFF);

  } else {

    emit_byte(op1);

    emit_byte(op2 | dstenc);

    emit_long(imm32);

  }

}

// immediate-to-memory forms

void Assembler::emit_arith_operand(int op1,

                                   Register rm, Address adr,

                                   int imm32) {

  assert((op1 & 0x01) == 1, "should be 32bit operation");

  assert((op1 & 0x02) == 0, "sign-extension bit should not be set");

  if (is8bit(imm32)) {

    emit_byte(op1 | 0x02); // set sign bit

    emit_operand(rm, adr, 1);

    emit_byte(imm32 & 0xFF);

  } else {

    emit_byte(op1);

    emit_operand(rm, adr, 4);

    emit_long(imm32);

  }

}

void Assembler::emit_arith(int op1, int op2, Register dst, Register src) {

  assert(isByte(op1) && isByte(op2), "wrong opcode");

  int dstenc = dst->encoding();

  int srcenc = src->encoding();

  if (dstenc >= 8) {

    dstenc -= 8;

  }

  if (srcenc >= 8) {

    srcenc -= 8;

  }

  emit_byte(op1);

  emit_byte(op2 | dstenc << 3 | srcenc);

}

void Assembler::emit_operand(Register reg, Register base, Register index,

                             Address::ScaleFactor scale, int disp,

                             RelocationHolder const& rspec,

                             int rip_relative_correction) {

  relocInfo::relocType rtype = (relocInfo::relocType) rspec.type();

  int regenc = reg->encoding();

  if (regenc >= 8) {

    regenc -= 8;

  }

  if (base->is_valid()) {

    if (index->is_valid()) {

      assert(scale != Address::no_scale, "inconsistent address");

      int indexenc = index->encoding();

      if (indexenc >= 8) {

        indexenc -= 8;

      }

      int baseenc = base->encoding();

      if (baseenc >= 8) {

        baseenc -= 8;

      }

      // [base + index*scale + disp]

      if (disp == 0 && rtype == relocInfo::none  &&

          base != rbp && base != r13) {

        // [base + index*scale]

        // [00 reg 100][ss index base]

        assert(index != rsp, "illegal addressing mode");

        emit_byte(0x04 | regenc << 3);

        emit_byte(scale << 6 | indexenc << 3 | baseenc);

      } else if (is8bit(disp) && rtype == relocInfo::none) {

        // [base + index*scale + imm8]

        // [01 reg 100][ss index base] imm8

        assert(index != rsp, "illegal addressing mode");

        emit_byte(0x44 | regenc << 3);

        emit_byte(scale << 6 | indexenc << 3 | baseenc);

        emit_byte(disp & 0xFF);

      } else {

        // [base + index*scale + disp32]

        // [10 reg 100][ss index base] disp32

        assert(index != rsp, "illegal addressing mode");

        emit_byte(0x84 | regenc << 3);

        emit_byte(scale << 6 | indexenc << 3 | baseenc);

        emit_data(disp, rspec, disp32_operand);

      }

    } else if (base == rsp || base == r12) {

      // [rsp + disp]

      if (disp == 0 && rtype == relocInfo::none) {

        // [rsp]

        // [00 reg 100][00 100 100]

        emit_byte(0x04 | regenc << 3);

        emit_byte(0x24);

      } else if (is8bit(disp) && rtype == relocInfo::none) {

        // [rsp + imm8]

        // [01 reg 100][00 100 100] disp8

        emit_byte(0x44 | regenc << 3);

        emit_byte(0x24);

        emit_byte(disp & 0xFF);

      } else {

        // [rsp + imm32]

        // [10 reg 100][00 100 100] disp32

        emit_byte(0x84 | regenc << 3);

        emit_byte(0x24);

        emit_data(disp, rspec, disp32_operand);

      }

    } else {

      // [base + disp]

      assert(base != rsp && base != r12, "illegal addressing mode");

      int baseenc = base->encoding();

      if (baseenc >= 8) {

        baseenc -= 8;

      }

      if (disp == 0 && rtype == relocInfo::none &&

          base != rbp && base != r13) {

        // [base]

        // [00 reg base]

        emit_byte(0x00 | regenc << 3 | baseenc);

      } else if (is8bit(disp) && rtype == relocInfo::none) {

        // [base + disp8]

        // [01 reg base] disp8

        emit_byte(0x40 | regenc << 3 | baseenc);

        emit_byte(disp & 0xFF);

      } else {

        // [base + disp32]

        // [10 reg base] disp32

        emit_byte(0x80 | regenc << 3 | baseenc);

        emit_data(disp, rspec, disp32_operand);

      }

    }

  } else {

    if (index->is_valid()) {

      assert(scale != Address::no_scale, "inconsistent address");

      int indexenc = index->encoding();

      if (indexenc >= 8) {

        indexenc -= 8;

      }

      // [index*scale + disp]

      // [00 reg 100][ss index 101] disp32

      assert(index != rsp, "illegal addressing mode");

      emit_byte(0x04 | regenc << 3);

      emit_byte(scale << 6 | indexenc << 3 | 0x05);

      emit_data(disp, rspec, disp32_operand);

#ifdef _LP64

    } else if (rtype != relocInfo::none ) {

      // [disp] RIP-RELATIVE

      // [00 000 101] disp32

      emit_byte(0x05 | regenc << 3);

      // Note that the RIP-rel. correction applies to the generated

      // disp field, but _not_ to the target address in the rspec.

      // disp was created by converting the target address minus the pc

      // at the start of the instruction. That needs more correction here.

      // intptr_t disp = target - next_ip;

      assert(inst_mark() != NULL, "must be inside InstructionMark");

      address next_ip = pc() + sizeof(int32_t) + rip_relative_correction;

      int64_t adjusted = (int64_t) disp -  (next_ip - inst_mark());

      assert(is_simm32(adjusted),

             "must be 32bit offset (RIP relative address)");

      emit_data((int) adjusted, rspec, disp32_operand);

#endif // _LP64

    } else {

      // [disp] ABSOLUTE

      // [00 reg 100][00 100 101] disp32

      emit_byte(0x04 | regenc << 3);

      emit_byte(0x25);

      emit_data(disp, rspec, disp32_operand);

    }

  }

}

void Assembler::emit_operand(XMMRegister reg, Register base, Register index,

                             Address::ScaleFactor scale, int disp,

                             RelocationHolder const& rspec,

                             int rip_relative_correction) {

  relocInfo::relocType rtype = (relocInfo::relocType) rspec.type();

  int regenc = reg->encoding();

  if (regenc >= 8) {

    regenc -= 8;

  }

  if (base->is_valid()) {

    if (index->is_valid()) {

      assert(scale != Address::no_scale, "inconsistent address");

      int indexenc = index->encoding();

      if (indexenc >= 8) {

        indexenc -= 8;

      }

      int baseenc = base->encoding();

      if (baseenc >= 8) {

        baseenc -= 8;

      }

      // [base + index*scale + disp]

      if (disp == 0 && rtype == relocInfo::none  &&

          base != rbp && base != r13) {

        // [base + index*scale]

        // [00 reg 100][ss index base]

        assert(index != rsp, "illegal addressing mode");

        emit_byte(0x04 | regenc << 3);

        emit_byte(scale << 6 | indexenc << 3 | baseenc);

      } else if (is8bit(disp) && rtype == relocInfo::none) {

        // [base + index*scale + disp8]

        // [01 reg 100][ss index base] disp8

        assert(index != rsp, "illegal addressing mode");

        emit_byte(0x44 | regenc << 3);

        emit_byte(scale << 6 | indexenc << 3 | baseenc);

        emit_byte(disp & 0xFF);

      } else {

        // [base + index*scale + disp32]

        // [10 reg 100][ss index base] disp32

        assert(index != rsp, "illegal addressing mode");

        emit_byte(0x84 | regenc << 3);

        emit_byte(scale << 6 | indexenc << 3 | baseenc);

        emit_data(disp, rspec, disp32_operand);

      }

    } else if (base == rsp || base == r12) {

      // [rsp + disp]

      if (disp == 0 && rtype == relocInfo::none) {

        // [rsp]

        // [00 reg 100][00 100 100]

        emit_byte(0x04 | regenc << 3);

        emit_byte(0x24);

      } else if (is8bit(disp) && rtype == relocInfo::none) {

        // [rsp + imm8]

        // [01 reg 100][00 100 100] disp8

        emit_byte(0x44 | regenc << 3);

        emit_byte(0x24);

        emit_byte(disp & 0xFF);

      } else {

        // [rsp + imm32]

        // [10 reg 100][00 100 100] disp32

        emit_byte(0x84 | regenc << 3);

        emit_byte(0x24);

        emit_data(disp, rspec, disp32_operand);

      }

    } else {

      // [base + disp]

      assert(base != rsp && base != r12, "illegal addressing mode");

      int baseenc = base->encoding();

      if (baseenc >= 8) {

        baseenc -= 8;

      }

      if (disp == 0 && rtype == relocInfo::none &&

          base != rbp && base != r13) {

        // [base]

        // [00 reg base]

        emit_byte(0x00 | regenc << 3 | baseenc);

      } else if (is8bit(disp) && rtype == relocInfo::none) {

        // [base + imm8]

        // [01 reg base] disp8

        emit_byte(0x40 | regenc << 3 | baseenc);

        emit_byte(disp & 0xFF);

      } else {

        // [base + imm32]

        // [10 reg base] disp32

        emit_byte(0x80 | regenc << 3 | baseenc);

        emit_data(disp, rspec, disp32_operand);

      }

    }

  } else {

    if (index->is_valid()) {

      assert(scale != Address::no_scale, "inconsistent address");

      int indexenc = index->encoding();