43972
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/*
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* Copyright (c) 2011, 2016, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package org.graalvm.compiler.lir.amd64;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.CONST;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.HINT;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.ILLEGAL;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.STACK;
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import static jdk.vm.ci.code.ValueUtil.asRegister;
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import static jdk.vm.ci.code.ValueUtil.isRegister;
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import org.graalvm.compiler.asm.Label;
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import org.graalvm.compiler.asm.NumUtil;
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import org.graalvm.compiler.asm.amd64.AMD64Address;
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import org.graalvm.compiler.asm.amd64.AMD64Address.Scale;
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import org.graalvm.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
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import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
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import org.graalvm.compiler.code.CompilationResult.JumpTable;
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import org.graalvm.compiler.core.common.calc.Condition;
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import org.graalvm.compiler.debug.GraalError;
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import org.graalvm.compiler.lir.LIRInstructionClass;
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import org.graalvm.compiler.lir.LabelRef;
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import org.graalvm.compiler.lir.Opcode;
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import org.graalvm.compiler.lir.StandardOp;
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import org.graalvm.compiler.lir.StandardOp.BlockEndOp;
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import org.graalvm.compiler.lir.SwitchStrategy;
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import org.graalvm.compiler.lir.SwitchStrategy.BaseSwitchClosure;
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import org.graalvm.compiler.lir.Variable;
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import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
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import jdk.vm.ci.amd64.AMD64;
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import jdk.vm.ci.amd64.AMD64.CPUFeature;
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import jdk.vm.ci.amd64.AMD64Kind;
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import jdk.vm.ci.code.Register;
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import jdk.vm.ci.meta.AllocatableValue;
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import jdk.vm.ci.meta.Constant;
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import jdk.vm.ci.meta.JavaConstant;
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import jdk.vm.ci.meta.Value;
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public class AMD64ControlFlow {
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public static final class ReturnOp extends AMD64BlockEndOp implements BlockEndOp {
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public static final LIRInstructionClass<ReturnOp> TYPE = LIRInstructionClass.create(ReturnOp.class);
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@Use({REG, ILLEGAL}) protected Value x;
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public ReturnOp(Value x) {
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super(TYPE);
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this.x = x;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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crb.frameContext.leave(crb);
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/*
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* We potentially return to the interpreter, and that's an AVX-SSE transition. The only
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* live value at this point should be the return value in either rax, or in xmm0 with
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* the upper half of the register unused, so we don't destroy any value here.
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*/
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if (masm.supports(CPUFeature.AVX)) {
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masm.vzeroupper();
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}
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masm.ret(0);
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}
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}
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public static class BranchOp extends AMD64BlockEndOp implements StandardOp.BranchOp {
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public static final LIRInstructionClass<BranchOp> TYPE = LIRInstructionClass.create(BranchOp.class);
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protected final ConditionFlag condition;
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protected final LabelRef trueDestination;
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protected final LabelRef falseDestination;
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private final double trueDestinationProbability;
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public BranchOp(Condition condition, LabelRef trueDestination, LabelRef falseDestination, double trueDestinationProbability) {
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this(intCond(condition), trueDestination, falseDestination, trueDestinationProbability);
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}
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public BranchOp(ConditionFlag condition, LabelRef trueDestination, LabelRef falseDestination, double trueDestinationProbability) {
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this(TYPE, condition, trueDestination, falseDestination, trueDestinationProbability);
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}
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protected BranchOp(LIRInstructionClass<? extends BranchOp> c, ConditionFlag condition, LabelRef trueDestination, LabelRef falseDestination, double trueDestinationProbability) {
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super(c);
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this.condition = condition;
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this.trueDestination = trueDestination;
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this.falseDestination = falseDestination;
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this.trueDestinationProbability = trueDestinationProbability;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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/*
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* The strategy for emitting jumps is: If either trueDestination or falseDestination is
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* the successor block, assume the block scheduler did the correct thing and jcc to the
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* other. Otherwise, we need a jcc followed by a jmp. Use the branch probability to make
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* sure it is more likely to branch on the jcc (= less likely to execute both the jcc
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* and the jmp instead of just the jcc). In the case of loops, that means the jcc is the
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* back-edge.
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*/
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if (crb.isSuccessorEdge(trueDestination)) {
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jcc(masm, true, falseDestination);
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} else if (crb.isSuccessorEdge(falseDestination)) {
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jcc(masm, false, trueDestination);
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} else if (trueDestinationProbability < 0.5) {
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jcc(masm, true, falseDestination);
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masm.jmp(trueDestination.label());
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} else {
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jcc(masm, false, trueDestination);
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masm.jmp(falseDestination.label());
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}
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}
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protected void jcc(AMD64MacroAssembler masm, boolean negate, LabelRef target) {
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masm.jcc(negate ? condition.negate() : condition, target.label());
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}
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}
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public static final class FloatBranchOp extends BranchOp {
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public static final LIRInstructionClass<FloatBranchOp> TYPE = LIRInstructionClass.create(FloatBranchOp.class);
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protected boolean unorderedIsTrue;
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public FloatBranchOp(Condition condition, boolean unorderedIsTrue, LabelRef trueDestination, LabelRef falseDestination, double trueDestinationProbability) {
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super(TYPE, floatCond(condition), trueDestination, falseDestination, trueDestinationProbability);
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this.unorderedIsTrue = unorderedIsTrue;
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}
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@Override
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protected void jcc(AMD64MacroAssembler masm, boolean negate, LabelRef target) {
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floatJcc(masm, negate ? condition.negate() : condition, negate ? !unorderedIsTrue : unorderedIsTrue, target.label());
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}
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}
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public static class StrategySwitchOp extends AMD64BlockEndOp {
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public static final LIRInstructionClass<StrategySwitchOp> TYPE = LIRInstructionClass.create(StrategySwitchOp.class);
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protected final Constant[] keyConstants;
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private final LabelRef[] keyTargets;
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private LabelRef defaultTarget;
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@Alive({REG}) protected Value key;
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@Temp({REG, ILLEGAL}) protected Value scratch;
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protected final SwitchStrategy strategy;
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public StrategySwitchOp(SwitchStrategy strategy, LabelRef[] keyTargets, LabelRef defaultTarget, Value key, Value scratch) {
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this(TYPE, strategy, keyTargets, defaultTarget, key, scratch);
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}
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protected StrategySwitchOp(LIRInstructionClass<? extends StrategySwitchOp> c, SwitchStrategy strategy, LabelRef[] keyTargets, LabelRef defaultTarget, Value key, Value scratch) {
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super(c);
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this.strategy = strategy;
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this.keyConstants = strategy.getKeyConstants();
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this.keyTargets = keyTargets;
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this.defaultTarget = defaultTarget;
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this.key = key;
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this.scratch = scratch;
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assert keyConstants.length == keyTargets.length;
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assert keyConstants.length == strategy.keyProbabilities.length;
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}
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@Override
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public void emitCode(final CompilationResultBuilder crb, final AMD64MacroAssembler masm) {
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strategy.run(new SwitchClosure(asRegister(key), crb, masm));
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}
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public class SwitchClosure extends BaseSwitchClosure {
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protected final Register keyRegister;
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protected final CompilationResultBuilder crb;
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protected final AMD64MacroAssembler masm;
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protected SwitchClosure(Register keyRegister, CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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super(crb, masm, keyTargets, defaultTarget);
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this.keyRegister = keyRegister;
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this.crb = crb;
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this.masm = masm;
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}
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protected void emitComparison(Constant c) {
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JavaConstant jc = (JavaConstant) c;
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switch (jc.getJavaKind()) {
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case Int:
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long lc = jc.asLong();
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assert NumUtil.isInt(lc);
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masm.cmpl(keyRegister, (int) lc);
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break;
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case Long:
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masm.cmpq(keyRegister, (AMD64Address) crb.asLongConstRef(jc));
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break;
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case Object:
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AMD64Move.const2reg(crb, masm, asRegister(scratch), jc);
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masm.cmpptr(keyRegister, asRegister(scratch));
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break;
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default:
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throw new GraalError("switch only supported for int, long and object");
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}
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}
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@Override
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protected void conditionalJump(int index, Condition condition, Label target) {
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emitComparison(keyConstants[index]);
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masm.jcc(intCond(condition), target);
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}
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}
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}
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public static final class TableSwitchOp extends AMD64BlockEndOp {
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public static final LIRInstructionClass<TableSwitchOp> TYPE = LIRInstructionClass.create(TableSwitchOp.class);
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private final int lowKey;
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private final LabelRef defaultTarget;
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private final LabelRef[] targets;
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@Use protected Value index;
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@Temp({REG, HINT}) protected Value idxScratch;
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@Temp protected Value scratch;
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public TableSwitchOp(final int lowKey, final LabelRef defaultTarget, final LabelRef[] targets, Value index, Variable scratch, Variable idxScratch) {
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super(TYPE);
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this.lowKey = lowKey;
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this.defaultTarget = defaultTarget;
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this.targets = targets;
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this.index = index;
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this.scratch = scratch;
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this.idxScratch = idxScratch;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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Register indexReg = asRegister(index, AMD64Kind.DWORD);
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Register idxScratchReg = asRegister(idxScratch, AMD64Kind.DWORD);
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Register scratchReg = asRegister(scratch, AMD64Kind.QWORD);
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if (!indexReg.equals(idxScratchReg)) {
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masm.movl(idxScratchReg, indexReg);
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}
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// Compare index against jump table bounds
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int highKey = lowKey + targets.length - 1;
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if (lowKey != 0) {
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// subtract the low value from the switch value
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masm.subl(idxScratchReg, lowKey);
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masm.cmpl(idxScratchReg, highKey - lowKey);
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} else {
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masm.cmpl(idxScratchReg, highKey);
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}
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// Jump to default target if index is not within the jump table
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if (defaultTarget != null) {
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masm.jcc(ConditionFlag.Above, defaultTarget.label());
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}
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// Set scratch to address of jump table
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masm.leaq(scratchReg, new AMD64Address(AMD64.rip, 0));
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final int afterLea = masm.position();
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// Load jump table entry into scratch and jump to it
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masm.movslq(idxScratchReg, new AMD64Address(scratchReg, idxScratchReg, Scale.Times4, 0));
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masm.addq(scratchReg, idxScratchReg);
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masm.jmp(scratchReg);
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// Inserting padding so that jump table address is 4-byte aligned
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if ((masm.position() & 0x3) != 0) {
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masm.nop(4 - (masm.position() & 0x3));
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}
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// Patch LEA instruction above now that we know the position of the jump table
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// TODO this is ugly and should be done differently
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final int jumpTablePos = masm.position();
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final int leaDisplacementPosition = afterLea - 4;
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masm.emitInt(jumpTablePos - afterLea, leaDisplacementPosition);
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// Emit jump table entries
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for (LabelRef target : targets) {
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Label label = target.label();
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int offsetToJumpTableBase = masm.position() - jumpTablePos;
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if (label.isBound()) {
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int imm32 = label.position() - jumpTablePos;
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masm.emitInt(imm32);
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} else {
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label.addPatchAt(masm.position());
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masm.emitByte(0); // pseudo-opcode for jump table entry
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masm.emitShort(offsetToJumpTableBase);
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masm.emitByte(0); // padding to make jump table entry 4 bytes wide
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}
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}
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JumpTable jt = new JumpTable(jumpTablePos, lowKey, highKey, 4);
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crb.compilationResult.addAnnotation(jt);
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}
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}
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@Opcode("CMOVE")
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public static final class CondMoveOp extends AMD64LIRInstruction {
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public static final LIRInstructionClass<CondMoveOp> TYPE = LIRInstructionClass.create(CondMoveOp.class);
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@Def({REG, HINT}) protected Value result;
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@Alive({REG}) protected Value trueValue;
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@Use({REG, STACK, CONST}) protected Value falseValue;
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private final ConditionFlag condition;
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public CondMoveOp(Variable result, Condition condition, AllocatableValue trueValue, Value falseValue) {
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super(TYPE);
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this.result = result;
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this.condition = intCond(condition);
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this.trueValue = trueValue;
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this.falseValue = falseValue;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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cmove(crb, masm, result, false, condition, false, trueValue, falseValue);
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}
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}
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@Opcode("CMOVE")
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public static final class FloatCondMoveOp extends AMD64LIRInstruction {
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public static final LIRInstructionClass<FloatCondMoveOp> TYPE = LIRInstructionClass.create(FloatCondMoveOp.class);
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@Def({REG}) protected Value result;
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@Alive({REG}) protected Value trueValue;
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@Alive({REG}) protected Value falseValue;
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private final ConditionFlag condition;
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private final boolean unorderedIsTrue;
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public FloatCondMoveOp(Variable result, Condition condition, boolean unorderedIsTrue, Variable trueValue, Variable falseValue) {
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super(TYPE);
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this.result = result;
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this.condition = floatCond(condition);
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this.unorderedIsTrue = unorderedIsTrue;
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this.trueValue = trueValue;
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this.falseValue = falseValue;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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cmove(crb, masm, result, true, condition, unorderedIsTrue, trueValue, falseValue);
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}
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}
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private static void floatJcc(AMD64MacroAssembler masm, ConditionFlag condition, boolean unorderedIsTrue, Label label) {
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Label endLabel = new Label();
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if (unorderedIsTrue && !trueOnUnordered(condition)) {
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masm.jcc(ConditionFlag.Parity, label);
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} else if (!unorderedIsTrue && trueOnUnordered(condition)) {
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masm.jccb(ConditionFlag.Parity, endLabel);
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}
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masm.jcc(condition, label);
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masm.bind(endLabel);
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}
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private static void cmove(CompilationResultBuilder crb, AMD64MacroAssembler masm, Value result, boolean isFloat, ConditionFlag condition, boolean unorderedIsTrue, Value trueValue,
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Value falseValue) {
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// check that we don't overwrite an input operand before it is used.
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370 |
assert !result.equals(trueValue);
|
|
371 |
|
|
372 |
AMD64Move.move(crb, masm, result, falseValue);
|
|
373 |
cmove(crb, masm, result, condition, trueValue);
|
|
374 |
|
|
375 |
if (isFloat) {
|
|
376 |
if (unorderedIsTrue && !trueOnUnordered(condition)) {
|
|
377 |
cmove(crb, masm, result, ConditionFlag.Parity, trueValue);
|
|
378 |
} else if (!unorderedIsTrue && trueOnUnordered(condition)) {
|
|
379 |
cmove(crb, masm, result, ConditionFlag.Parity, falseValue);
|
|
380 |
}
|
|
381 |
}
|
|
382 |
}
|
|
383 |
|
|
384 |
private static void cmove(CompilationResultBuilder crb, AMD64MacroAssembler masm, Value result, ConditionFlag cond, Value other) {
|
|
385 |
if (isRegister(other)) {
|
|
386 |
assert !asRegister(other).equals(asRegister(result)) : "other already overwritten by previous move";
|
|
387 |
switch ((AMD64Kind) other.getPlatformKind()) {
|
|
388 |
case BYTE:
|
|
389 |
case WORD:
|
|
390 |
case DWORD:
|
|
391 |
masm.cmovl(cond, asRegister(result), asRegister(other));
|
|
392 |
break;
|
|
393 |
case QWORD:
|
|
394 |
masm.cmovq(cond, asRegister(result), asRegister(other));
|
|
395 |
break;
|
|
396 |
default:
|
|
397 |
throw GraalError.shouldNotReachHere();
|
|
398 |
}
|
|
399 |
} else {
|
|
400 |
AMD64Address addr = (AMD64Address) crb.asAddress(other);
|
|
401 |
switch ((AMD64Kind) other.getPlatformKind()) {
|
|
402 |
case BYTE:
|
|
403 |
case WORD:
|
|
404 |
case DWORD:
|
|
405 |
masm.cmovl(cond, asRegister(result), addr);
|
|
406 |
break;
|
|
407 |
case QWORD:
|
|
408 |
masm.cmovq(cond, asRegister(result), addr);
|
|
409 |
break;
|
|
410 |
default:
|
|
411 |
throw GraalError.shouldNotReachHere();
|
|
412 |
}
|
|
413 |
}
|
|
414 |
}
|
|
415 |
|
|
416 |
private static ConditionFlag intCond(Condition cond) {
|
|
417 |
switch (cond) {
|
|
418 |
case EQ:
|
|
419 |
return ConditionFlag.Equal;
|
|
420 |
case NE:
|
|
421 |
return ConditionFlag.NotEqual;
|
|
422 |
case LT:
|
|
423 |
return ConditionFlag.Less;
|
|
424 |
case LE:
|
|
425 |
return ConditionFlag.LessEqual;
|
|
426 |
case GE:
|
|
427 |
return ConditionFlag.GreaterEqual;
|
|
428 |
case GT:
|
|
429 |
return ConditionFlag.Greater;
|
|
430 |
case BE:
|
|
431 |
return ConditionFlag.BelowEqual;
|
|
432 |
case AE:
|
|
433 |
return ConditionFlag.AboveEqual;
|
|
434 |
case AT:
|
|
435 |
return ConditionFlag.Above;
|
|
436 |
case BT:
|
|
437 |
return ConditionFlag.Below;
|
|
438 |
default:
|
|
439 |
throw GraalError.shouldNotReachHere();
|
|
440 |
}
|
|
441 |
}
|
|
442 |
|
|
443 |
private static ConditionFlag floatCond(Condition cond) {
|
|
444 |
switch (cond) {
|
|
445 |
case EQ:
|
|
446 |
return ConditionFlag.Equal;
|
|
447 |
case NE:
|
|
448 |
return ConditionFlag.NotEqual;
|
|
449 |
case LT:
|
|
450 |
return ConditionFlag.Below;
|
|
451 |
case LE:
|
|
452 |
return ConditionFlag.BelowEqual;
|
|
453 |
case GE:
|
|
454 |
return ConditionFlag.AboveEqual;
|
|
455 |
case GT:
|
|
456 |
return ConditionFlag.Above;
|
|
457 |
default:
|
|
458 |
throw GraalError.shouldNotReachHere();
|
|
459 |
}
|
|
460 |
}
|
|
461 |
|
|
462 |
private static boolean trueOnUnordered(ConditionFlag condition) {
|
|
463 |
switch (condition) {
|
|
464 |
case AboveEqual:
|
|
465 |
case NotEqual:
|
|
466 |
case Above:
|
|
467 |
case Less:
|
|
468 |
case Overflow:
|
|
469 |
return false;
|
|
470 |
case Equal:
|
|
471 |
case BelowEqual:
|
|
472 |
case Below:
|
|
473 |
case GreaterEqual:
|
|
474 |
case NoOverflow:
|
|
475 |
return true;
|
|
476 |
default:
|
|
477 |
throw GraalError.shouldNotReachHere();
|
|
478 |
}
|
|
479 |
}
|
|
480 |
}
|