8144343: [aix] Stack bottom should be page aligned
Summary: On thread create or attach, ensure stack bottom is aligned to os::vm_page_size()
Reviewed-by: simonis, kvn
--- a/hotspot/src/os/aix/vm/os_aix.cpp Thu Nov 26 14:19:29 2015 +0400
+++ b/hotspot/src/os/aix/vm/os_aix.cpp Wed Dec 02 10:17:31 2015 +0100
@@ -2263,8 +2263,12 @@
bool os::pd_commit_memory(char* addr, size_t size, bool exec) {
- assert0(is_aligned_to(addr, os::vm_page_size()));
- assert0(is_aligned_to(size, os::vm_page_size()));
+ assert(is_aligned_to(addr, os::vm_page_size()),
+ "addr " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
+ p2i(addr), os::vm_page_size());
+ assert(is_aligned_to(size, os::vm_page_size()),
+ "size " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
+ size, os::vm_page_size());
vmembk_t* const vmi = vmembk_find(addr);
assert0(vmi);
@@ -2287,8 +2291,12 @@
}
bool os::pd_uncommit_memory(char* addr, size_t size) {
- assert0(is_aligned_to(addr, os::vm_page_size()));
- assert0(is_aligned_to(size, os::vm_page_size()));
+ assert(is_aligned_to(addr, os::vm_page_size()),
+ "addr " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
+ p2i(addr), os::vm_page_size());
+ assert(is_aligned_to(size, os::vm_page_size()),
+ "size " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
+ size, os::vm_page_size());
// Dynamically do different things for mmap/shmat.
const vmembk_t* const vmi = vmembk_find(addr);
@@ -4299,7 +4307,7 @@
pthread_t tid = pthread_self();
struct __pthrdsinfo pinfo;
- char dummy[1]; // We only need this to satisfy the api and to not get E.
+ char dummy[1]; // Just needed to satisfy pthread_getthrds_np.
int dummy_size = sizeof(dummy);
memset(&pinfo, 0, sizeof(pinfo));
@@ -4320,38 +4328,39 @@
// Not sure what to do here - I feel inclined to forbid this use case completely.
guarantee0(pinfo.__pi_stacksize);
- // Note: the pthread stack on AIX seems to look like this:
- //
- // --------------------- real base ? at page border ?
+ // Note: we get three values from pthread_getthrds_np:
+ // __pi_stackaddr, __pi_stacksize, __pi_stackend
//
- // pthread internal data, like ~2K, see also
- // http://publib.boulder.ibm.com/infocenter/pseries/v5r3/index.jsp?topic=/com.ibm.aix.prftungd/doc/prftungd/thread_supp_tun_params.htm
- //
- // --------------------- __pi_stackend - not page aligned, (xxxxF890)
- //
- // stack
- // ....
+ // high addr ---------------------
//
- // stack
- //
- // --------------------- __pi_stackend - __pi_stacksize
- //
- // padding due to AIX guard pages (?) see AIXTHREAD_GUARDPAGES
- // --------------------- __pi_stackaddr (page aligned if AIXTHREAD_GUARDPAGES > 0)
+ // | pthread internal data, like ~2K
+ // |
+ // | --------------------- __pi_stackend (usually not page aligned, (xxxxF890))
+ // |
+ // |
+ // |
+ // |
+ // |
+ // |
+ // | --------------------- (__pi_stackend - __pi_stacksize)
+ // |
+ // | padding to align the following AIX guard pages, if enabled.
+ // |
+ // V --------------------- __pi_stackaddr
//
- // AIX guard pages (?)
+ // low addr AIX guard pages, if enabled (AIXTHREAD_GUARDPAGES > 0)
//
- // So, the safe thing to do is to use the area from __pi_stackend to __pi_stackaddr;
- // __pi_stackend however is almost never page aligned.
- //
+ address stack_base = (address)(pinfo.__pi_stackend);
+ address stack_low_addr = (address)align_ptr_up(pinfo.__pi_stackaddr, os::vm_page_size());
+ size_t stack_size = stack_base - stack_low_addr;
if (p_stack_base) {
- (*p_stack_base) = (address) (pinfo.__pi_stackend);
+ *p_stack_base = stack_base;
}
if (p_stack_size) {
- (*p_stack_size) = pinfo.__pi_stackend - pinfo.__pi_stackaddr;
+ *p_stack_size = stack_size;
}
return true;