--- a/src/hotspot/cpu/x86/x86_64.ad	Thu Nov 08 14:32:49 2018 +0100
+++ b/src/hotspot/cpu/x86/x86_64.ad	Thu Nov 08 15:11:32 2018 +0100
@@ -9263,6 +9263,18 @@
 %}
 
 // And Memory with Register
+instruct andB_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
+%{
+  match(Set dst (StoreB dst (AndI (LoadB dst) src)));
+  effect(KILL cr);
+
+  ins_cost(150);
+  format %{ "andb    $dst, $src\t# byte" %}
+  opcode(0x20);
+  ins_encode(REX_breg_mem(src, dst), OpcP, reg_mem(src, dst));
+  ins_pipe(ialu_mem_reg);
+%}
+
 instruct andI_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
 %{
   match(Set dst (StoreI dst (AndI (LoadI dst) src)));
@@ -9444,6 +9456,18 @@
 %}
 
 // Or Memory with Register
+instruct orB_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
+%{
+  match(Set dst (StoreB dst (OrI (LoadB dst) src)));
+  effect(KILL cr);
+
+  ins_cost(150);
+  format %{ "orb    $dst, $src\t# byte" %}
+  opcode(0x08);
+  ins_encode(REX_breg_mem(src, dst), OpcP, reg_mem(src, dst));
+  ins_pipe(ialu_mem_reg);
+%}
+
 instruct orI_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
 %{
   match(Set dst (StoreI dst (OrI (LoadI dst) src)));
@@ -9520,6 +9544,18 @@
 %}
 
 // Xor Memory with Register
+instruct xorB_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
+%{
+  match(Set dst (StoreB dst (XorI (LoadB dst) src)));
+  effect(KILL cr);
+
+  ins_cost(150);
+  format %{ "xorb    $dst, $src\t# byte" %}
+  opcode(0x30);
+  ins_encode(REX_breg_mem(src, dst), OpcP, reg_mem(src, dst));
+  ins_pipe(ialu_mem_reg);
+%}
+
 instruct xorI_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
 %{
   match(Set dst (StoreI dst (XorI (LoadI dst) src)));

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/test/hotspot/jtreg/compiler/c2/Test8bitLogicalOperators.java	Thu Nov 08 15:11:32 2018 +0100
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ */
+
+/*
+ * @test
+ * @bug 8213479
+ * @summary Missing x86_64.ad patterns for 8-bit logical operators with destination in memory
+ *
+ * @run main/othervm -Xcomp -XX:-Inline -XX:CompileOnly=compiler.c2.Test8bitLogicalOperators::test
+ *      compiler.c2.Test8bitLogicalOperators
+ */
+
+package compiler.c2;
+
+public class Test8bitLogicalOperators {
+    private static byte and = 0b0011, or = 0b0011, xor = 0b0011;
+    private static byte mask = 0b0101;
+
+    public static void main(String... args) {
+        test();
+
+        if (and != 0b0001 || or != 0b0111 || xor != 0b0110)
+            throw new AssertionError("8-bit logical operator failure");
+    }
+
+    public static void test() {
+        and &= mask;
+
+        or |= mask;
+
+        xor ^= mask;
+    }
+}