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8016157: During CTW: C2: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG defined in this block
authoradlertz
Fri, 14 Jun 2013 01:19:56 +0200
changeset 18102 5c2c46c821ba
parent 18101 fdcebbc730e1
child 18103 a17a8a4b7e5c
8016157: During CTW: C2: assert(!def_outside->member(r)) failed: Use of external LRG overlaps the same LRG defined in this block Summary: Disable rematerialization for negD node Reviewed-by: kvn, roland
hotspot/src/share/vm/adlc/formssel.cpp file | annotate | diff | comparison | revisions
hotspot/src/share/vm/adlc/formssel.hpp file | annotate | diff | comparison | revisions 
--- a/hotspot/src/share/vm/adlc/formssel.cpp	Thu Jun 13 15:39:47 2013 -0400
+++ b/hotspot/src/share/vm/adlc/formssel.cpp	Fri Jun 14 01:19:56 2013 +0200
@@ -235,6 +235,9 @@
   return false;
 }
 
+bool InstructForm::is_ideal_negD() const {
+  return (_matrule && _matrule->_rChild && strcmp(_matrule->_rChild->_opType, "NegD") == 0);
+}
 
 // Return 'true' if this instruction matches an ideal 'Copy*' node
 int InstructForm::is_ideal_copy() const {
@@ -533,6 +536,12 @@
   if( data_type != Form::none )
     rematerialize = true;
 
+  // Ugly: until a better fix is implemented, disable rematerialization for
+  // negD nodes because they are proved to be problematic.
+  if (is_ideal_negD()) {
+    return false;
+  }
+
   // Constants
   if( _components.count() == 1 && _components[0]->is(Component::USE_DEF) )
     rematerialize = true;
--- a/hotspot/src/share/vm/adlc/formssel.hpp	Thu Jun 13 15:39:47 2013 -0400
+++ b/hotspot/src/share/vm/adlc/formssel.hpp	Fri Jun 14 01:19:56 2013 +0200
@@ -147,6 +147,7 @@
   virtual int         is_empty_encoding() const; // _size=0 and/or _insencode empty
   virtual int         is_tls_instruction() const; // tlsLoadP rule or ideal ThreadLocal
   virtual int         is_ideal_copy() const;    // node matches ideal 'Copy*'
+  virtual bool        is_ideal_negD() const;    // node matches ideal 'NegD'
   virtual bool        is_ideal_if()   const;    // node matches ideal 'If'
   virtual bool        is_ideal_fastlock() const; // node matches 'FastLock'
   virtual bool        is_ideal_membar() const;  // node matches ideal 'MemBarXXX'
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