--- a/hotspot/src/cpu/sparc/vm/nativeInst_sparc.cpp Mon Jun 02 13:53:52 2014 -0700
+++ b/hotspot/src/cpu/sparc/vm/nativeInst_sparc.cpp Mon Jun 02 15:48:34 2014 -0700
@@ -690,149 +690,6 @@
// End code for unit testing implementation of NativeMovRegMem class
-//--------------------------------------------------------------------------------
-
-
-void NativeMovRegMemPatching::copy_instruction_to(address new_instruction_address) {
- Untested("copy_instruction_to");
- int instruction_size = next_instruction_address() - instruction_address();
- for (int i = 0; i < instruction_size; i += wordSize) {
- *(long*)(new_instruction_address + i) = *(long*)(address(this) + i);
- }
-}
-
-
-void NativeMovRegMemPatching::verify() {
- NativeInstruction::verify();
- // make sure code pattern is actually a "ld" or "st" of some sort.
- int i0 = long_at(0);
- int op3 = inv_op3(i0);
-
- assert((int)nop_offset == (int)NativeMovConstReg::add_offset, "sethi size ok");
-
- if (!(is_op(i0, Assembler::ldst_op) &&
- inv_immed(i0) &&
- 0 != (op3 < op3_ldst_int_limit
- ? (1 << op3 ) & (op3_mask_ld | op3_mask_st)
- : (1 << (op3 - op3_ldst_int_limit)) & (op3_mask_ldf | op3_mask_stf)))) {
- int i1 = long_at(ldst_offset);
- Register rd = inv_rd(i0);
-
- op3 = inv_op3(i1);
- if (!is_op(i1, Assembler::ldst_op) && rd == inv_rs2(i1) &&
- 0 != (op3 < op3_ldst_int_limit
- ? (1 << op3 ) & (op3_mask_ld | op3_mask_st)
- : (1 << (op3 - op3_ldst_int_limit)) & (op3_mask_ldf | op3_mask_stf))) {
- fatal("not a ld* or st* op");
- }
- }
-}
-
-
-void NativeMovRegMemPatching::print() {
- if (is_immediate()) {
- tty->print_cr(INTPTR_FORMAT ": mov reg, [reg + %d]", p2i(instruction_address()), offset());
- } else {
- tty->print_cr(INTPTR_FORMAT ": mov reg, [reg + reg]", p2i(instruction_address()));
- }
-}
-
-
-// Code for unit testing implementation of NativeMovRegMemPatching class
-void NativeMovRegMemPatching::test() {
-#ifdef ASSERT
- ResourceMark rm;
- CodeBuffer cb("test", 1000, 1000);
- MacroAssembler* a = new MacroAssembler(&cb);
- NativeMovRegMemPatching* nm;
- uint idx = 0;
- uint idx1;
- int offsets[] = {
- 0x0,
- 0xffffffff,
- 0x7fffffff,
- 0x80000000,
- 4096,
- 4097,
- 0x20,
- 0x4000,
- };
-
- VM_Version::allow_all();
-
- AddressLiteral al(0xffffffff, relocInfo::external_word_type);
- a->ldsw( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldsw( G5, I3, G4 ); idx++;
- a->ldsb( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldsb( G5, I3, G4 ); idx++;
- a->ldsh( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldsh( G5, I3, G4 ); idx++;
- a->lduw( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->lduw( G5, I3, G4 ); idx++;
- a->ldub( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldub( G5, I3, G4 ); idx++;
- a->lduh( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->lduh( G5, I3, G4 ); idx++;
- a->ldx( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldx( G5, I3, G4 ); idx++;
- a->ldd( G5, al.low10(), G4); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldd( G5, I3, G4 ); idx++;
- a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++;
-
- a->stw( G5, G4, al.low10()); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->stw( G5, G4, I3 ); idx++;
- a->stb( G5, G4, al.low10()); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->stb( G5, G4, I3 ); idx++;
- a->sth( G5, G4, al.low10()); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->sth( G5, G4, I3 ); idx++;
- a->stx( G5, G4, al.low10()); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->stx( G5, G4, I3 ); idx++;
- a->std( G5, G4, al.low10()); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->std( G5, G4, I3 ); idx++;
- a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++;
- a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
- a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++;
-
- nm = nativeMovRegMemPatching_at( cb.insts_begin() );
- nm->print();
- nm->set_offset( low10(0) );
- nm->print();
- nm->add_offset_in_bytes( low10(0xbb) * wordSize );
- nm->print();
-
- while (--idx) {
- nm = nativeMovRegMemPatching_at( nm->next_instruction_address() );
- nm->print();
- for (idx1 = 0; idx1 < ARRAY_SIZE(offsets); idx1++) {
- nm->set_offset( nm->is_immediate() ? low10(offsets[idx1]) : offsets[idx1] );
- assert(nm->offset() == (nm->is_immediate() ? low10(offsets[idx1]) : offsets[idx1]),
- "check unit test");
- nm->print();
- }
- nm->add_offset_in_bytes( low10(0xbb) * wordSize );
- nm->print();
- }
-
- VM_Version::revert();
-#endif // ASSERT
-}
-// End code for unit testing implementation of NativeMovRegMemPatching class
-
//--------------------------------------------------------------------------------
--- a/hotspot/src/cpu/sparc/vm/nativeInst_sparc.hpp Mon Jun 02 13:53:52 2014 -0700
+++ b/hotspot/src/cpu/sparc/vm/nativeInst_sparc.hpp Mon Jun 02 15:48:34 2014 -0700
@@ -38,7 +38,6 @@
// - - NativeMovConstReg
// - - NativeMovConstRegPatching
// - - NativeMovRegMem
-// - - NativeMovRegMemPatching
// - - NativeJump
// - - NativeGeneralJump
// - - NativeIllegalInstruction
@@ -710,96 +709,6 @@
};
-// An interface for accessing/manipulating native memory ops
-// ld* [reg + offset], reg
-// st* reg, [reg + offset]
-// sethi %hi(imm), reg; nop; add reg, %lo(imm), reg; ld* [reg1 + reg], reg2
-// sethi %hi(imm), reg; nop; add reg, %lo(imm), reg; st* reg2, [reg1 + reg]
-// Ops covered: {lds,ldu,st}{w,b,h}, {ld,st}{d,x}
-//
-// Note that it is identical to NativeMovRegMem with the exception of a nop between the
-// sethi and the add. The nop is required to be in the delay slot of the call instruction
-// which overwrites the sethi during patching.
-class NativeMovRegMemPatching;
-inline NativeMovRegMemPatching* nativeMovRegMemPatching_at (address address);
-class NativeMovRegMemPatching: public NativeInstruction {
- public:
- enum Sparc_specific_constants {
- op3_mask_ld = 1 << Assembler::lduw_op3 |
- 1 << Assembler::ldub_op3 |
- 1 << Assembler::lduh_op3 |
- 1 << Assembler::ldd_op3 |
- 1 << Assembler::ldsw_op3 |
- 1 << Assembler::ldsb_op3 |
- 1 << Assembler::ldsh_op3 |
- 1 << Assembler::ldx_op3,
- op3_mask_st = 1 << Assembler::stw_op3 |
- 1 << Assembler::stb_op3 |
- 1 << Assembler::sth_op3 |
- 1 << Assembler::std_op3 |
- 1 << Assembler::stx_op3,
- op3_ldst_int_limit = Assembler::ldf_op3,
- op3_mask_ldf = 1 << (Assembler::ldf_op3 - op3_ldst_int_limit) |
- 1 << (Assembler::lddf_op3 - op3_ldst_int_limit),
- op3_mask_stf = 1 << (Assembler::stf_op3 - op3_ldst_int_limit) |
- 1 << (Assembler::stdf_op3 - op3_ldst_int_limit),
-
- offset_width = 13,
- sethi_offset = 0,
-#ifdef _LP64
- nop_offset = 7 * BytesPerInstWord,
-#else
- nop_offset = 4,
-#endif
- add_offset = nop_offset + BytesPerInstWord,
- ldst_offset = add_offset + BytesPerInstWord
- };
- bool is_immediate() const {
- // check if instruction is ld* [reg + offset], reg or st* reg, [reg + offset]
- int i0 = long_at(0);
- return (is_op(i0, Assembler::ldst_op));
- }
-
- address instruction_address() const { return addr_at(0); }
- address next_instruction_address() const {
- return addr_at(is_immediate()? 4 : 16);
- }
- int offset() const {
- return is_immediate()? inv_simm(long_at(0), offset_width) :
- nativeMovConstRegPatching_at(addr_at(0))->data();
- }
- void set_offset(int x) {
- if (is_immediate()) {
- guarantee(fits_in_simm(x, offset_width), "data block offset overflow");
- set_long_at(0, set_simm(long_at(0), x, offset_width));
- }
- else
- nativeMovConstRegPatching_at(addr_at(0))->set_data(x);
- }
-
- void add_offset_in_bytes(intptr_t radd_offset) {
- set_offset (offset() + radd_offset);
- }
-
- void copy_instruction_to(address new_instruction_address);
-
- void verify();
- void print ();
-
- // unit test stuff
- static void test();
-
- private:
- friend inline NativeMovRegMemPatching* nativeMovRegMemPatching_at (address address) {
- NativeMovRegMemPatching* test = (NativeMovRegMemPatching*)address;
- #ifdef ASSERT
- test->verify();
- #endif
- return test;
- }
-};
-
-
// An interface for accessing/manipulating native jumps
// jump_to addr
// == sethi %hi22(addr), temp ; jumpl reg, %lo10(addr), G0 ; <delay>