# HG changeset patch
# User iveresov
# Date 1306276205 25200
# Node ID dedfe67ddc58a8131faf4411d81f3c9ddc99e8ad
# Parent  4ca3f136aa2322a001c038fa629595b8569a3c1b
7046893: LP64 problem with double_quadword in c1_LIRAssembler_x86.cpp
Summary: Fixed invalid casts in address computation
Reviewed-by: kvn, never
Contributed-by: thomas.salter@unisys.com

diff -r 4ca3f136aa23 -r dedfe67ddc58 hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
--- a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Tue May 24 12:54:51 2011 -0700
+++ b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Tue May 24 15:30:05 2011 -0700
@@ -47,7 +47,7 @@
 static jlong* double_quadword(jlong *adr, jlong lo, jlong hi) {
   // Use the expression (adr)&(~0xF) to provide 128-bits aligned address
   // of 128-bits operands for SSE instructions.
-  jlong *operand = (jlong*)(((long)adr)&((long)(~0xF)));
+  jlong *operand = (jlong*)(((intptr_t)adr) & ((intptr_t)(~0xF)));
   // Store the value to a 128-bits operand.
   operand[0] = lo;
   operand[1] = hi;