# HG changeset patch # User fyang # Date 1527117610 -28800 # Node ID 9a87afc491488c9a3a1b74d36124d769808bd8a4 # Parent b4bfc263cdc625f1dd509cf1423fb3b56a184e18 8203041: AArch64: fix overflow in immediate cmp/cmn instruction Summary: fix overflow in immediate cmp/cmn instruction for AArch64 Reviewed-by: aph, dpochepk, drwhite Contributed-by: joshua.zhu@arm.com diff -r b4bfc263cdc6 -r 9a87afc49148 src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp --- a/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp Wed May 23 21:08:33 2018 +0200 +++ b/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp Thu May 24 07:20:10 2018 +0800 @@ -3851,7 +3851,9 @@ __ sub(cnt1, cnt1, 8 * wordSize); __ eor(tmp7, tmp7, tmp8); __ ldp(tmp2, tmp4, Address(__ post(a2, 2 * wordSize))); - __ cmp(cnt1, loopThreshold); + // tmp6 is not used. MacroAssembler::subs is used here (rather than + // cmp) because subs allows an unlimited range of immediate operand. + __ subs(tmp6, cnt1, loopThreshold); __ orr(tmp5, tmp5, tmp7); __ cbnz(tmp5, NOT_EQUAL); __ br(__ GE, LOOP); @@ -3877,7 +3879,7 @@ __ ld1(v0, v1, v2, v3, __ T2D, Address(__ post(a1, 4 * 2 * wordSize))); __ sub(cnt1, cnt1, 8 * wordSize); __ ld1(v4, v5, v6, v7, __ T2D, Address(__ post(a2, 4 * 2 * wordSize))); - __ cmp(cnt1, loopThreshold); + __ subs(tmp1, cnt1, loopThreshold); __ eor(v0, __ T16B, v0, v4); __ eor(v1, __ T16B, v1, v5); __ eor(v2, __ T16B, v2, v6); @@ -3936,7 +3938,7 @@ } if (UseSIMDForArrayEquals) { if (SoftwarePrefetchHintDistance >= 0) { - __ cmp(cnt1, prefetchLoopThreshold); + __ subs(tmp1, cnt1, prefetchLoopThreshold); __ br(__ LE, NO_PREFETCH_LARGE_LOOP); generate_large_array_equals_loop_simd(prefetchLoopThreshold, /* prfm = */ true, NOT_EQUAL); @@ -3949,7 +3951,7 @@ } else { __ push(spilled_regs, sp); if (SoftwarePrefetchHintDistance >= 0) { - __ cmp(cnt1, prefetchLoopThreshold); + __ subs(tmp1, cnt1, prefetchLoopThreshold); __ br(__ LE, NO_PREFETCH_LARGE_LOOP); generate_large_array_equals_loop_nonsimd(prefetchLoopThreshold, /* prfm = */ true, NOT_EQUAL);