diff -r 9442bb67de26 -r 8e38f7594806 hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Sat Feb 20 15:15:35 2016 +0000 +++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Sat Mar 05 22:22:37 2016 +0800 @@ -1638,6 +1638,7 @@ void MacroAssembler::atomic_incw(Register counter_addr, Register tmp, Register tmp2) { Label retry_load; + prfm(Address(counter_addr), PSTL1STRM); bind(retry_load); // flush and load exclusive from the memory location ldxrw(tmp, counter_addr); @@ -2078,7 +2079,7 @@ membar(AnyAny); } else { Label retry_load, nope; - + prfm(Address(addr), PSTL1STRM); bind(retry_load); // flush and load exclusive from the memory location // and fail if it is not what we expect @@ -2114,7 +2115,7 @@ membar(AnyAny); } else { Label retry_load, nope; - + prfm(Address(addr), PSTL1STRM); bind(retry_load); // flush and load exclusive from the memory location // and fail if it is not what we expect @@ -2149,6 +2150,7 @@ } else { BLOCK_COMMENT("cmpxchg {"); Label retry_load, done; + prfm(Address(addr), PSTL1STRM); bind(retry_load); load_exclusive(tmp, addr, size, acquire); if (size == xword) @@ -2177,6 +2179,7 @@ result = different(prev, incr, addr) ? prev : rscratch2; \ \ Label retry_load; \ + prfm(Address(addr), PSTL1STRM); \ bind(retry_load); \ LDXR(result, addr); \ OP(rscratch1, result, incr); \ @@ -2199,6 +2202,7 @@ result = different(prev, newv, addr) ? prev : rscratch2; \ \ Label retry_load; \ + prfm(Address(addr), PSTL1STRM); \ bind(retry_load); \ LDXR(result, addr); \ STXR(rscratch1, newv, addr); \