diff -r e00dfcc21fa1 -r 55047d16f141 hotspot/src/cpu/x86/vm/vm_version_x86.hpp
--- a/hotspot/src/cpu/x86/vm/vm_version_x86.hpp	Tue Apr 05 20:32:54 2016 +0000
+++ b/hotspot/src/cpu/x86/vm/vm_version_x86.hpp	Wed Mar 30 17:04:14 2016 +0200
@@ -844,6 +844,11 @@
   static uint32_t get_xsave_header_upper_segment() {
     return _cpuid_info.xem_xcr0_edx;
   }
+
+  // SSE2 and later processors implement a 'pause' instruction
+  // that can be used for efficient implementation of
+  // the intrinsic for java.lang.Thread.onSpinWait()
+  static bool supports_on_spin_wait() { return supports_sse2(); }
 };
 
 #endif // CPU_X86_VM_VM_VERSION_X86_HPP