Tue, 25 Aug 2015 07:49:55 +0200 8075805: Crash while trying to release CompiledICHolder
thartmann [Tue, 25 Aug 2015 07:49:55 +0200] rev 32401
8075805: Crash while trying to release CompiledICHolder Summary: Removed nmethod transition to zombie outside of sweeper. Added cleaning of ICs of unloaded nmethods. Reviewed-by: kvn, iveresov
Fri, 21 Aug 2015 09:12:42 +0200 Merge
roland [Fri, 21 Aug 2015 09:12:42 +0200] rev 32400
Merge
Thu, 20 Aug 2015 09:40:08 +0000 8133842: aarch64: C2 generates illegal instructions with int shifts >=32
enevill [Thu, 20 Aug 2015 09:40:08 +0000] rev 32399
8133842: aarch64: C2 generates illegal instructions with int shifts >=32 Summary: Fix logical operatations combined with shifts >= 32 Reviewed-by: kvn, aph, adinn
Tue, 18 Aug 2015 16:10:34 +0200 8131969: jit/FloatingPoint/gen_math/Loops05 assert(2 <= size && size <= 16) failed: update low bits table
roland [Tue, 18 Aug 2015 16:10:34 +0200] rev 32398
8131969: jit/FloatingPoint/gen_math/Loops05 assert(2 <= size && size <= 16) failed: update low bits table Summary: assert in register allocation code when vector Phi for a loop is processed because code assumes all inputs already processed Reviewed-by: kvn
Wed, 19 Aug 2015 17:59:00 -0700 8133984: print_compressed_class_space() is only defined in 64-bit VM
kvn [Wed, 19 Aug 2015 17:59:00 -0700] rev 32397
8133984: print_compressed_class_space() is only defined in 64-bit VM Summary: define method's empty body in 32-bit VM. Reviewed-by: coleenp
Tue, 11 Aug 2015 10:25:24 -0400 8078743: AARCH64: Extend use of stlr to cater for volatile object stores
adinn [Tue, 11 Aug 2015 10:25:24 -0400] rev 32396
8078743: AARCH64: Extend use of stlr to cater for volatile object stores Summary: The current use of stlr on AArch64 to implement volatile stores needs to be extended to cater for object stores. Reviewed-by: kvn, aph, enevill
Tue, 18 Aug 2015 12:40:22 +0000 8133352: aarch64: generates constrained unpredictable instructions
enevill [Tue, 18 Aug 2015 12:40:22 +0000] rev 32395
8133352: aarch64: generates constrained unpredictable instructions Summary: Fix generation of unpredictable STXR Rs, Rt, [Rn] with Rs == Rt Reviewed-by: kvn, aph, adinn
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