/*+
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 * Copyright 1997-2004 Sun Microsystems, Inc.  All Rights Reserved.+
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.+
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 *+
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 * This code is free software; you can redistribute it and/or modify it+
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 * under the terms of the GNU General Public License version 2 only, as+
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 * published by the Free Software Foundation.+
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 *+
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 * This code is distributed in the hope that it will be useful, but WITHOUT+
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or+
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License+
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 * version 2 for more details (a copy is included in the LICENSE file that+
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 * accompanied this code).+
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 *+
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 * You should have received a copy of the GNU General Public License version+
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 * 2 along with this work; if not, write to the Free Software Foundation,+
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.+
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 *+
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 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,+
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 * CA 95054 USA or visit www.sun.com if you need additional information or+
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 * have any questions.+
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 *+
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 */+
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+
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// Interface for updating the instruction cache.  Whenever the VM modifies+
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// code, part of the processor instruction cache potentially has to be flushed.+
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+
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// On the x86, this is a no-op -- the I-cache is guaranteed to be consistent+
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// after the next jump, and the VM never modifies instructions directly ahead+
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// of the instruction fetch path.+
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+
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// [phh] It's not clear that the above comment is correct, because on an MP+
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// system where the dcaches are not snooped, only the thread doing the invalidate+
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// will see the update.  Even in the snooped case, a memory fence would be+
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// necessary if stores weren't ordered.  Fortunately, they are on all known+
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// x86 implementations.+
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+
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class ICache : public AbstractICache {+
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 public:+
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#ifdef AMD64+
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  enum {+
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    stub_size      = 64, // Size of the icache flush stub in bytes+
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    line_size      = 32, // Icache line size in bytes+
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    log2_line_size = 5   // log2(line_size)+
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  };+
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+
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  // Use default implementation+
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#else+
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  enum {+
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    stub_size      = 16,                 // Size of the icache flush stub in bytes+
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    line_size      = BytesPerWord,      // conservative+
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    log2_line_size = LogBytesPerWord    // log2(line_size)+
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  };+
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#endif // AMD64+
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};+
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