hotspot/src/share/vm/c1/c1_LinearScan.cpp
changeset 42063 dca9294d9f59
parent 39219 1b33aa56ed18
child 46630 75aa3e39d02c
--- a/hotspot/src/share/vm/c1/c1_LinearScan.cpp	Thu Sep 22 18:23:15 2016 +0200
+++ b/hotspot/src/share/vm/c1/c1_LinearScan.cpp	Thu Sep 22 18:29:15 2016 +0200
@@ -1077,7 +1077,7 @@
   }
 
 
-#ifdef X86
+#if defined(X86) || defined(S390)
   if (op->code() == lir_cmove) {
     // conditional moves can handle stack operands
     assert(op->result_opr()->is_register(), "result must always be in a register");
@@ -1088,7 +1088,7 @@
   // this operand is allowed to be on the stack in some cases
   BasicType opr_type = opr->type_register();
   if (opr_type == T_FLOAT || opr_type == T_DOUBLE) {
-    if ((UseSSE == 1 && opr_type == T_FLOAT) || UseSSE >= 2) {
+    if ((UseSSE == 1 && opr_type == T_FLOAT) || UseSSE >= 2 S390_ONLY(|| true)) {
       // SSE float instruction (T_DOUBLE only supported with SSE2)
       switch (op->code()) {
         case lir_cmp:
@@ -1144,7 +1144,7 @@
       }
     }
   }
-#endif // X86
+#endif // X86 S390
 
   // all other operands require a register
   return mustHaveRegister;
@@ -2653,6 +2653,11 @@
     VMReg rname = frame_map()->fpu_regname(opr->fpu_regnr());
 #ifndef __SOFTFP__
 #ifndef VM_LITTLE_ENDIAN
+    // On S390 a (single precision) float value occupies only the high
+    // word of the full double register. So when the double register is
+    // stored to memory (e.g. by the RegisterSaver), then the float value
+    // is found at offset 0. I.e. the code below is not needed on S390.
+#ifndef S390
     if (! float_saved_as_double) {
       // On big endian system, we may have an issue if float registers use only
       // the low half of the (same) double registers.
@@ -2667,6 +2672,7 @@
         rname = next; // VMReg for the low bits, e.g. the real VMReg for the float
       }
     }
+#endif // !S390
 #endif
 #endif
     LocationValue* sv = new LocationValue(Location::new_reg_loc(loc_type, rname));