--- a/src/hotspot/cpu/sparc/nativeInst_sparc.hpp Thu Oct 31 17:16:36 2019 +0100
+++ b/src/hotspot/cpu/sparc/nativeInst_sparc.hpp Tue Nov 05 11:53:46 2019 +0100
@@ -576,7 +576,8 @@
// sethi and the add. The nop is required to be in the delay slot of the call instruction
// which overwrites the sethi during patching.
class NativeMovConstRegPatching;
-inline NativeMovConstRegPatching* nativeMovConstRegPatching_at(address address);class NativeMovConstRegPatching: public NativeInstruction {
+inline NativeMovConstRegPatching* nativeMovConstRegPatching_at(address address);
+class NativeMovConstRegPatching: public NativeInstruction {
public:
enum Sparc_specific_constants {
sethi_offset = 0,
@@ -664,10 +665,13 @@
return (is_op(i0, Assembler::ldst_op));
}
- address instruction_address() const { return addr_at(0); }
- address next_instruction_address() const {
- return addr_at(is_immediate() ? 4 : (7 * BytesPerInstWord));
+ address instruction_address() const { return addr_at(0); }
+
+ int num_bytes_to_end_of_patch() const {
+ return is_immediate()? BytesPerInstWord :
+ NativeMovConstReg::instruction_size;
}
+
intptr_t offset() const {
return is_immediate()? inv_simm(long_at(0), offset_width) :
nativeMovConstReg_at(addr_at(0))->data();
@@ -684,8 +688,6 @@
set_offset (offset() + radd_offset);
}
- void copy_instruction_to(address new_instruction_address);
-
void verify();
void print ();