--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp Wed May 02 19:26:42 2018 +0200
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "gc/shared/barrierSetAssembler.hpp"
+
+#define __ masm->
+
+void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
+ Register dst, Address src, Register tmp1, Register tmp2, Register tmp3) {
+ bool on_heap = (decorators & IN_HEAP) != 0;
+ bool on_root = (decorators & IN_ROOT) != 0;
+ switch (type) {
+ case T_OBJECT:
+ case T_ARRAY: {
+ if (on_heap) {
+#ifdef AARCH64
+ if (UseCompressedOops) {
+ __ ldr_w(dst, src);
+ __ decode_heap_oop(dst);
+ } else
+#endif // AARCH64
+ {
+ __ ldr(dst, src);
+ }
+ } else {
+ assert(on_root, "why else?");
+ __ ldr(dst, src);
+ }
+ break;
+ }
+ default: Unimplemented();
+ }
+
+}
+
+void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
+ Address obj, Register val, Register tmp1, Register tmp2, Register tmp3, bool is_null) {
+ bool on_heap = (decorators & IN_HEAP) != 0;
+ bool on_root = (decorators & IN_ROOT) != 0;
+ switch (type) {
+ case T_OBJECT:
+ case T_ARRAY: {
+ if (on_heap) {
+#ifdef AARCH64
+ if (UseCompressedOops) {
+ assert(!dst.uses(src), "not enough registers");
+ if (!is_null) {
+ __ encode_heap_oop(src);
+ }
+ __ str_w(val, obj);
+ } else
+#endif // AARCH64
+ {
+ __ str(val, obj);
+ }
+ } else {
+ assert(on_root, "why else?");
+ __ str(val, obj);
+ }
+ break;
+ }
+ default: Unimplemented();
+ }
+}
+