--- a/src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp	Mon Sep 03 13:39:35 2018 +0300
+++ b/src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp	Mon Sep 03 13:42:58 2018 +0300
@@ -50,6 +50,43 @@
     }
     break;
   }
+  case T_BOOLEAN: __ ldrb      (dst, src); break;
+  case T_BYTE:    __ ldrsb     (dst, src); break;
+  case T_CHAR:    __ ldrh      (dst, src); break;
+  case T_SHORT:   __ ldrsh     (dst, src); break;
+  case T_INT:     __ ldr_s32   (dst, src); break;
+  case T_ADDRESS: __ ldr       (dst, src); break;
+  case T_LONG:
+#ifdef AARCH64
+    __ ldr                     (dst, src); break;
+#else
+    assert(dst == noreg, "only to ltos");
+    __ add                     (src.index(), src.index(), src.base());
+    __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+#endif // AARCH64
+    break;
+#ifdef __SOFTFP__
+  case T_FLOAT:
+    assert(dst == noreg, "only to ftos");
+    __ ldr                     (R0_tos, src);
+    break;
+  case T_DOUBLE:
+    assert(dst == noreg, "only to dtos");
+    __ add                     (src.index(), src.index(), src.base());
+    __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+    break;
+#else
+  case T_FLOAT:
+    assert(dst == noreg, "only to ftos");
+    __ add(src.index(), src.index(), src.base());
+    __ ldr_float               (S0_tos, src.index());
+    break;
+  case T_DOUBLE:
+    assert(dst == noreg, "only to dtos");
+    __ add                     (src.index(), src.index(), src.base());
+    __ ldr_double              (D0_tos, src.index());
+    break;
+#endif
   default: Unimplemented();
   }
 
@@ -73,7 +110,7 @@
       } else
 #endif // AARCH64
       {
-        __ str(val, obj);
+      __ str(val, obj);
       }
     } else {
       assert(in_native, "why else?");
@@ -81,6 +118,46 @@
     }
     break;
   }
+  case T_BOOLEAN:
+    __ and_32(val, val, 1);
+    __ strb(val, obj);
+    break;
+  case T_BYTE:    __ strb      (val, obj); break;
+  case T_CHAR:    __ strh      (val, obj); break;
+  case T_SHORT:   __ strh      (val, obj); break;
+  case T_INT:     __ str       (val, obj); break;
+  case T_ADDRESS: __ str       (val, obj); break;
+  case T_LONG:
+#ifdef AARCH64
+    __ str                     (val, obj); break;
+#else // AARCH64
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+#endif // AARCH64
+    break;
+#ifdef __SOFTFP__
+  case T_FLOAT:
+    assert(val == noreg, "only tos");
+    __ str (R0_tos,  obj);
+    break;
+  case T_DOUBLE:
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+    break;
+#else
+  case T_FLOAT:
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ str_float               (S0_tos,  obj.index());
+    break;
+  case T_DOUBLE:
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ str_double              (D0_tos,  obj.index());
+    break;
+#endif
   default: Unimplemented();
   }
 }