704 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ || |
704 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ || |
705 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ } |
705 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ } |
706 inline bool NativeInstruction::is_safepoint_poll() { |
706 inline bool NativeInstruction::is_safepoint_poll() { |
707 #ifdef AMD64 |
707 #ifdef AMD64 |
708 if (SafepointMechanism::uses_thread_local_poll()) { |
708 if (SafepointMechanism::uses_thread_local_poll()) { |
709 // We know that the poll must have a REX_B prefix since we enforce its source to be |
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710 // a rex-register and the destination to be rax. |
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711 const bool has_rex_prefix = ubyte_at(0) == NativeTstRegMem::instruction_rex_b_prefix; |
709 const bool has_rex_prefix = ubyte_at(0) == NativeTstRegMem::instruction_rex_b_prefix; |
712 const bool is_test_opcode = ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl; |
710 const int test_offset = has_rex_prefix ? 1 : 0; |
713 const bool is_rax_target = (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg; |
711 const bool is_test_opcode = ubyte_at(test_offset) == NativeTstRegMem::instruction_code_memXregl; |
714 if (has_rex_prefix && is_test_opcode && is_rax_target) { |
712 const bool is_rax_target = (ubyte_at(test_offset + 1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg; |
715 return true; |
713 return is_test_opcode && is_rax_target; |
716 } |
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717 } |
714 } |
718 // Try decoding a near safepoint first: |
715 // Try decoding a near safepoint first: |
719 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl && |
716 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl && |
720 ubyte_at(1) == 0x05) { // 00 rax 101 |
717 ubyte_at(1) == 0x05) { // 00 rax 101 |
721 address fault = addr_at(6) + int_at(2); |
718 address fault = addr_at(6) + int_at(2); |