2387 const Register cache = r2; |
2387 const Register cache = r2; |
2388 const Register index = r3; |
2388 const Register index = r3; |
2389 const Register obj = r4; |
2389 const Register obj = r4; |
2390 const Register off = r19; |
2390 const Register off = r19; |
2391 const Register flags = r0; |
2391 const Register flags = r0; |
|
2392 const Register raw_flags = r6; |
2392 const Register bc = r4; // uses same reg as obj, so don't mix them |
2393 const Register bc = r4; // uses same reg as obj, so don't mix them |
2393 |
2394 |
2394 resolve_cache_and_index(byte_no, cache, index, sizeof(u2)); |
2395 resolve_cache_and_index(byte_no, cache, index, sizeof(u2)); |
2395 jvmti_post_field_access(cache, index, is_static, false); |
2396 jvmti_post_field_access(cache, index, is_static, false); |
2396 load_field_cp_cache_entry(obj, cache, index, off, flags, is_static); |
2397 load_field_cp_cache_entry(obj, cache, index, off, raw_flags, is_static); |
2397 |
2398 |
2398 if (!is_static) { |
2399 if (!is_static) { |
2399 // obj is on the stack |
2400 // obj is on the stack |
2400 pop_and_check_object(obj); |
2401 pop_and_check_object(obj); |
2401 } |
2402 } |
2402 |
2403 |
|
2404 // 8179954: We need to make sure that the code generated for |
|
2405 // volatile accesses forms a sequentially-consistent set of |
|
2406 // operations when combined with STLR and LDAR. Without a leading |
|
2407 // membar it's possible for a simple Dekker test to fail if loads |
|
2408 // use LDR;DMB but stores use STLR. This can happen if C2 compiles |
|
2409 // the stores in one method and we interpret the loads in another. |
|
2410 if (! UseBarriersForVolatile) { |
|
2411 Label notVolatile; |
|
2412 __ tbz(raw_flags, ConstantPoolCacheEntry::is_volatile_shift, notVolatile); |
|
2413 __ membar(MacroAssembler::AnyAny); |
|
2414 __ bind(notVolatile); |
|
2415 } |
|
2416 |
2403 const Address field(obj, off); |
2417 const Address field(obj, off); |
2404 |
2418 |
2405 Label Done, notByte, notBool, notInt, notShort, notChar, |
2419 Label Done, notByte, notBool, notInt, notShort, notChar, |
2406 notLong, notFloat, notObj, notDouble; |
2420 notLong, notFloat, notObj, notDouble; |
2407 |
2421 |
2408 // x86 uses a shift and mask or wings it with a shift plus assert |
2422 // x86 uses a shift and mask or wings it with a shift plus assert |
2409 // the mask is not needed. aarch64 just uses bitfield extract |
2423 // the mask is not needed. aarch64 just uses bitfield extract |
2410 __ ubfxw(flags, flags, ConstantPoolCacheEntry::tos_state_shift, ConstantPoolCacheEntry::tos_state_bits); |
2424 __ ubfxw(flags, raw_flags, ConstantPoolCacheEntry::tos_state_shift, |
|
2425 ConstantPoolCacheEntry::tos_state_bits); |
2411 |
2426 |
2412 assert(btos == 0, "change code, btos != 0"); |
2427 assert(btos == 0, "change code, btos != 0"); |
2413 __ cbnz(flags, notByte); |
2428 __ cbnz(flags, notByte); |
2414 |
2429 |
2415 // Don't rewrite getstatic, only getfield |
2430 // Don't rewrite getstatic, only getfield |
2977 // r0: object |
2994 // r0: object |
2978 __ verify_oop(r0); |
2995 __ verify_oop(r0); |
2979 __ null_check(r0); |
2996 __ null_check(r0); |
2980 const Address field(r0, r1); |
2997 const Address field(r0, r1); |
2981 |
2998 |
|
2999 // 8179954: We need to make sure that the code generated for |
|
3000 // volatile accesses forms a sequentially-consistent set of |
|
3001 // operations when combined with STLR and LDAR. Without a leading |
|
3002 // membar it's possible for a simple Dekker test to fail if loads |
|
3003 // use LDR;DMB but stores use STLR. This can happen if C2 compiles |
|
3004 // the stores in one method and we interpret the loads in another. |
|
3005 if (! UseBarriersForVolatile) { |
|
3006 Label notVolatile; |
|
3007 __ tbz(r3, ConstantPoolCacheEntry::is_volatile_shift, notVolatile); |
|
3008 __ membar(MacroAssembler::AnyAny); |
|
3009 __ bind(notVolatile); |
|
3010 } |
|
3011 |
2982 // access field |
3012 // access field |
2983 switch (bytecode()) { |
3013 switch (bytecode()) { |
2984 case Bytecodes::_fast_agetfield: |
3014 case Bytecodes::_fast_agetfield: |
2985 __ load_heap_oop(r0, field); |
3015 __ load_heap_oop(r0, field); |
2986 __ verify_oop(r0); |
3016 __ verify_oop(r0); |
3025 __ ldr(r0, aaddress(0)); |
3055 __ ldr(r0, aaddress(0)); |
3026 // access constant pool cache |
3056 // access constant pool cache |
3027 __ get_cache_and_index_at_bcp(r2, r3, 2); |
3057 __ get_cache_and_index_at_bcp(r2, r3, 2); |
3028 __ ldr(r1, Address(r2, in_bytes(ConstantPoolCache::base_offset() + |
3058 __ ldr(r1, Address(r2, in_bytes(ConstantPoolCache::base_offset() + |
3029 ConstantPoolCacheEntry::f2_offset()))); |
3059 ConstantPoolCacheEntry::f2_offset()))); |
|
3060 |
|
3061 // 8179954: We need to make sure that the code generated for |
|
3062 // volatile accesses forms a sequentially-consistent set of |
|
3063 // operations when combined with STLR and LDAR. Without a leading |
|
3064 // membar it's possible for a simple Dekker test to fail if loads |
|
3065 // use LDR;DMB but stores use STLR. This can happen if C2 compiles |
|
3066 // the stores in one method and we interpret the loads in another. |
|
3067 if (! UseBarriersForVolatile) { |
|
3068 Label notVolatile; |
|
3069 __ ldrw(r3, Address(r2, in_bytes(ConstantPoolCache::base_offset() + |
|
3070 ConstantPoolCacheEntry::flags_offset()))); |
|
3071 __ tbz(r3, ConstantPoolCacheEntry::is_volatile_shift, notVolatile); |
|
3072 __ membar(MacroAssembler::AnyAny); |
|
3073 __ bind(notVolatile); |
|
3074 } |
|
3075 |
3030 // make sure exception is reported in correct bcp range (getfield is |
3076 // make sure exception is reported in correct bcp range (getfield is |
3031 // next instruction) |
3077 // next instruction) |
3032 __ increment(rbcp); |
3078 __ increment(rbcp); |
3033 __ null_check(r0); |
3079 __ null_check(r0); |
3034 switch (state) { |
3080 switch (state) { |