src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp
changeset 50767 356eaea05bf0
parent 50693 db0a17475826
child 51224 dd1aa4229fd4
equal deleted inserted replaced
50766:759f63d8a9fe 50767:356eaea05bf0
   263   __ block_comment("save_live_registers");
   263   __ block_comment("save_live_registers");
   264 
   264 
   265   __ push(RegSet::range(r0, r29), sp);         // integer registers except lr & sp
   265   __ push(RegSet::range(r0, r29), sp);         // integer registers except lr & sp
   266 
   266 
   267   if (save_fpu_registers) {
   267   if (save_fpu_registers) {
   268     for (int i = 30; i >= 0; i -= 2)
   268     for (int i = 31; i>= 0; i -= 4) {
   269       __ stpd(as_FloatRegister(i), as_FloatRegister(i+1),
   269       __ sub(sp, sp, 4 * wordSize); // no pre-increment for st1. Emulate it without modifying other registers
   270               Address(__ pre(sp, -2 * wordSize)));
   270       __ st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
       
   271           as_FloatRegister(i), __ T1D, Address(sp));
       
   272     }
   271   } else {
   273   } else {
   272     __ add(sp, sp, -32 * wordSize);
   274     __ add(sp, sp, -32 * wordSize);
   273   }
   275   }
   274 
   276 
   275   return generate_oop_map(sasm, save_fpu_registers);
   277   return generate_oop_map(sasm, save_fpu_registers);
   276 }
   278 }
   277 
   279 
   278 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
   280 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
   279   if (restore_fpu_registers) {
   281   if (restore_fpu_registers) {
   280     for (int i = 0; i < 32; i += 2)
   282     for (int i = 0; i < 32; i += 4)
   281       __ ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
   283       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
   282               Address(__ post(sp, 2 * wordSize)));
   284           as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
   283   } else {
   285   } else {
   284     __ add(sp, sp, 32 * wordSize);
   286     __ add(sp, sp, 32 * wordSize);
   285   }
   287   }
   286 
   288 
   287   __ pop(RegSet::range(r0, r29), sp);
   289   __ pop(RegSet::range(r0, r29), sp);
   288 }
   290 }
   289 
   291 
   290 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true)  {
   292 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true)  {
   291 
   293 
   292   if (restore_fpu_registers) {
   294   if (restore_fpu_registers) {
   293     for (int i = 0; i < 32; i += 2)
   295     for (int i = 0; i < 32; i += 4)
   294       __ ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
   296       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
   295               Address(__ post(sp, 2 * wordSize)));
   297           as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
   296   } else {
   298   } else {
   297     __ add(sp, sp, 32 * wordSize);
   299     __ add(sp, sp, 32 * wordSize);
   298   }
   300   }
   299 
   301 
   300   __ ldp(zr, r1, Address(__ post(sp, 16)));
   302   __ ldp(zr, r1, Address(__ post(sp, 16)));