hotspot/src/share/vm/c1/c1_LIRAssembler.cpp
author thartmann
Tue, 31 Jan 2017 18:42:45 +0100
changeset 43676 c6eed495a42b
parent 38031 e0b822facc03
permissions -rw-r--r--
8173373: C1: NPE is thrown instead of LinkageError when accessing inaccessible field on NULL receiver Summary: Deoptimize if receiver null check of unresolved field access fails to throw NoClassDefFoundError instead of NPE. Reviewed-by: vlivanov
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/*
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 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "c1/c1_Compilation.hpp"
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#include "c1/c1_Instruction.hpp"
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#include "c1/c1_InstructionPrinter.hpp"
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#include "c1/c1_LIRAssembler.hpp"
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#include "c1/c1_MacroAssembler.hpp"
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#include "c1/c1_ValueStack.hpp"
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#include "ci/ciInstance.hpp"
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#include "runtime/os.hpp"
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void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
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  // We must have enough patching space so that call can be inserted.
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  // We cannot use fat nops here, since the concurrent code rewrite may transiently
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  // create the illegal instruction sequence.
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  while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
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    _masm->nop();
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  }
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  patch->install(_masm, patch_code, obj, info);
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  append_code_stub(patch);
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#ifdef ASSERT
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  Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
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  if (patch->id() == PatchingStub::access_field_id) {
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    switch (code) {
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      case Bytecodes::_putstatic:
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      case Bytecodes::_getstatic:
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      case Bytecodes::_putfield:
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      case Bytecodes::_getfield:
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        break;
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      default:
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        ShouldNotReachHere();
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    }
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  } else if (patch->id() == PatchingStub::load_klass_id) {
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    switch (code) {
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      case Bytecodes::_new:
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      case Bytecodes::_anewarray:
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      case Bytecodes::_multianewarray:
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      case Bytecodes::_instanceof:
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      case Bytecodes::_checkcast:
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        break;
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      default:
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        ShouldNotReachHere();
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    }
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  } else if (patch->id() == PatchingStub::load_mirror_id) {
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    switch (code) {
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      case Bytecodes::_putstatic:
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      case Bytecodes::_getstatic:
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      case Bytecodes::_ldc:
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      case Bytecodes::_ldc_w:
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        break;
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      default:
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        ShouldNotReachHere();
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    }
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  } else if (patch->id() == PatchingStub::load_appendix_id) {
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    Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
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    assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
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  } else {
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    ShouldNotReachHere();
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  }
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#endif
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}
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PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
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  IRScope* scope = info->scope();
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  Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
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  if (Bytecodes::has_optional_appendix(bc_raw)) {
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    return PatchingStub::load_appendix_id;
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  }
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  return PatchingStub::load_mirror_id;
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}
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//---------------------------------------------------------------
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LIR_Assembler::LIR_Assembler(Compilation* c):
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   _compilation(c)
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 , _masm(c->masm())
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 , _bs(Universe::heap()->barrier_set())
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 , _frame_map(c->frame_map())
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 , _current_block(NULL)
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 , _pending_non_safepoint(NULL)
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 , _pending_non_safepoint_offset(0)
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{
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  _slow_case_stubs = new CodeStubList();
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}
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LIR_Assembler::~LIR_Assembler() {
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}
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void LIR_Assembler::check_codespace() {
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  CodeSection* cs = _masm->code_section();
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  if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
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    BAILOUT("CodeBuffer overflow");
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  }
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}
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void LIR_Assembler::append_code_stub(CodeStub* stub) {
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  _slow_case_stubs->append(stub);
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}
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void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
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  for (int m = 0; m < stub_list->length(); m++) {
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    CodeStub* s = stub_list->at(m);
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    check_codespace();
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    CHECK_BAILOUT();
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#ifndef PRODUCT
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    if (CommentedAssembly) {
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      stringStream st;
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      s->print_name(&st);
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      st.print(" slow case");
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      _masm->block_comment(st.as_string());
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    }
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#endif
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    s->emit_code(this);
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#ifdef ASSERT
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    s->assert_no_unbound_labels();
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#endif
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  }
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}
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void LIR_Assembler::emit_slow_case_stubs() {
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  emit_stubs(_slow_case_stubs);
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}
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bool LIR_Assembler::needs_icache(ciMethod* method) const {
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  return !method->is_static();
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}
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int LIR_Assembler::code_offset() const {
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  return _masm->offset();
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}
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address LIR_Assembler::pc() const {
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  return _masm->pc();
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}
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// To bang the stack of this compiled method we use the stack size
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// that the interpreter would need in case of a deoptimization. This
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// removes the need to bang the stack in the deoptimization blob which
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// in turn simplifies stack overflow handling.
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int LIR_Assembler::bang_size_in_bytes() const {
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  return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
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}
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void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
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  for (int i = 0; i < info_list->length(); i++) {
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    XHandlers* handlers = info_list->at(i)->exception_handlers();
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    for (int j = 0; j < handlers->length(); j++) {
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      XHandler* handler = handlers->handler_at(j);
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      assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
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      assert(handler->entry_code() == NULL ||
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             handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
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             handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
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      if (handler->entry_pco() == -1) {
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        // entry code not emitted yet
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        if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
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          handler->set_entry_pco(code_offset());
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          if (CommentedAssembly) {
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            _masm->block_comment("Exception adapter block");
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          }
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          emit_lir_list(handler->entry_code());
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        } else {
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          handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
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        }
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        assert(handler->entry_pco() != -1, "must be set now");
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      }
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    }
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  }
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}
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void LIR_Assembler::emit_code(BlockList* hir) {
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  if (PrintLIR) {
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    print_LIR(hir);
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  }
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  int n = hir->length();
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  for (int i = 0; i < n; i++) {
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    emit_block(hir->at(i));
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    CHECK_BAILOUT();
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  }
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  flush_debug_info(code_offset());
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  DEBUG_ONLY(check_no_unbound_labels());
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}
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void LIR_Assembler::emit_block(BlockBegin* block) {
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  if (block->is_set(BlockBegin::backward_branch_target_flag)) {
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    align_backward_branch_target();
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  }
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  // if this block is the start of an exception handler, record the
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  // PC offset of the first instruction for later construction of
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  // the ExceptionHandlerTable
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  if (block->is_set(BlockBegin::exception_entry_flag)) {
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    block->set_exception_handler_pco(code_offset());
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  }
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#ifndef PRODUCT
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  if (PrintLIRWithAssembly) {
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    // don't print Phi's
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    InstructionPrinter ip(false);
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    block->print(ip);
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  }
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#endif /* PRODUCT */
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  assert(block->lir() != NULL, "must have LIR");
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  X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
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#ifndef PRODUCT
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  if (CommentedAssembly) {
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    stringStream st;
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    st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
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    _masm->block_comment(st.as_string());
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  }
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#endif
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  emit_lir_list(block->lir());
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  X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
1
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}
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void LIR_Assembler::emit_lir_list(LIR_List* list) {
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  peephole(list);
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  int n = list->length();
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  for (int i = 0; i < n; i++) {
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    LIR_Op* op = list->at(i);
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    check_codespace();
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    CHECK_BAILOUT();
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#ifndef PRODUCT
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    if (CommentedAssembly) {
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      // Don't record out every op since that's too verbose.  Print
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      // branches since they include block and stub names.  Also print
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      // patching moves since they generate funny looking code.
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      if (op->code() == lir_branch ||
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          (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
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        stringStream st;
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        op->print_on(&st);
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        _masm->block_comment(st.as_string());
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      }
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    }
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    if (PrintLIRWithAssembly) {
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      // print out the LIR operation followed by the resulting assembly
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      list->at(i)->print(); tty->cr();
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    }
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#endif /* PRODUCT */
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    op->emit_code(this);
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    if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
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      process_debug_info(op);
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    }
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#ifndef PRODUCT
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    if (PrintLIRWithAssembly) {
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      _masm->code()->decode();
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    }
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#endif /* PRODUCT */
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  }
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}
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#ifdef ASSERT
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void LIR_Assembler::check_no_unbound_labels() {
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  CHECK_BAILOUT();
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  for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
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    if (!_branch_target_blocks.at(i)->label()->is_bound()) {
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      tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
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      assert(false, "unbound label");
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    }
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  }
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}
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#endif
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//----------------------------------debug info--------------------------------
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void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
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  int pc_offset = code_offset();
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  flush_debug_info(pc_offset);
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  info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
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  if (info->exception_handlers() != NULL) {
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    compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
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  }
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}
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void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
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  flush_debug_info(pc_offset);
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  cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
1
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  if (cinfo->exception_handlers() != NULL) {
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    compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
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  }
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}
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static ValueStack* debug_info(Instruction* ins) {
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  StateSplit* ss = ins->as_StateSplit();
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  if (ss != NULL) return ss->state();
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  return ins->state_before();
1
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}
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void LIR_Assembler::process_debug_info(LIR_Op* op) {
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  Instruction* src = op->source();
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  if (src == NULL)  return;
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  int pc_offset = code_offset();
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  if (_pending_non_safepoint == src) {
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    _pending_non_safepoint_offset = pc_offset;
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    return;
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  }
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  ValueStack* vstack = debug_info(src);
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  if (vstack == NULL)  return;
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  if (_pending_non_safepoint != NULL) {
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    // Got some old debug info.  Get rid of it.
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    if (debug_info(_pending_non_safepoint) == vstack) {
1
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      _pending_non_safepoint_offset = pc_offset;
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      return;
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    }
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   360
    if (_pending_non_safepoint_offset < pc_offset) {
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      record_non_safepoint_debug_info();
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    }
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    _pending_non_safepoint = NULL;
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  }
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  // Remember the debug info.
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  if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
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    _pending_non_safepoint = src;
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    _pending_non_safepoint_offset = pc_offset;
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  }
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}
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   371
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// Index caller states in s, where 0 is the oldest, 1 its callee, etc.
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// Return NULL if n is too large.
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// Returns the caller_bci for the next-younger state, also.
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static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
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  ValueStack* t = s;
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  for (int i = 0; i < n; i++) {
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parents:
diff changeset
   378
    if (t == NULL)  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
    t = t->caller_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
  if (t == NULL)  return NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
  for (;;) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
    ValueStack* tc = t->caller_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
    if (tc == NULL)  return s;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
    t = tc;
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6453
diff changeset
   386
    bci_result = tc->bci();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
    s = s->caller_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
void LIR_Assembler::record_non_safepoint_debug_info() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
  int         pc_offset = _pending_non_safepoint_offset;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
  ValueStack* vstack    = debug_info(_pending_non_safepoint);
6745
a34ef8968a84 6986046: C1 valuestack cleanup
roland
parents: 6453
diff changeset
   394
  int         bci       = vstack->bci();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
  DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
  assert(debug_info->recording_non_safepoints(), "sanity");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
  debug_info->add_non_safepoint(pc_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
  // Visit scopes from oldest to youngest.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
  for (int n = 0; ; n++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
    int s_bci = bci;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
    ValueStack* s = nth_oldest(vstack, n, s_bci);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
    if (s == NULL)  break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
    IRScope* scope = s->scope();
3600
27aa4477d039 6833129: specjvm98 fails with NullPointerException in the compiler with -XX:DeoptimizeALot
cfang
parents: 1412
diff changeset
   407
    //Always pass false for reexecute since these ScopeDescs are never used for deopt
33160
c59f1676d27e 8136421: JEP 243: Java-Level JVM Compiler Interface
twisti
parents: 33089
diff changeset
   408
    methodHandle null_mh;
c59f1676d27e 8136421: JEP 243: Java-Level JVM Compiler Interface
twisti
parents: 33089
diff changeset
   409
    debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
  debug_info->end_non_safepoint(pc_offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 33465
diff changeset
   416
ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 33465
diff changeset
   417
  return add_debug_info_for_null_check(code_offset(), cinfo);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 33465
diff changeset
   420
ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
  ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24018
diff changeset
   422
  append_code_stub(stub);
34220
1ba69cb5585c 8138952: C1: Distinguish between PPC32 and PPC64
mdoerr
parents: 33465
diff changeset
   423
  return stub;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
489c9b5090e2 Initial load
duke
parents:
diff changeset
   426
void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
  add_debug_info_for_div0(code_offset(), info);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   429
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
  DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
24669
14439491d407 8031475: Missing oopmap in patching stubs
neliasso
parents: 24018
diff changeset
   432
  append_code_stub(stub);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
489c9b5090e2 Initial load
duke
parents:
diff changeset
   435
void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
  rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   437
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
489c9b5090e2 Initial load
duke
parents:
diff changeset
   440
void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
  verify_oop_map(op->info());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
  if (os::is_MP()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
    // must align calls sites, otherwise they can't be updated atomically on MP hardware
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
    align_call(op->code());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   446
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
  // emit the static call stub stuff out of line
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
  emit_static_call_stub();
32082
2a3323e25de1 8130309: Need to bailout cleanly if creation of stubs fails when codecache is out of space
thartmann
parents: 28954
diff changeset
   450
  CHECK_BAILOUT();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   451
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
  switch (op->code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
  case lir_static_call:
13487
75aa4880b15f 7192167: JSR 292: C1 has old broken code which needs to be removed
twisti
parents: 12739
diff changeset
   454
  case lir_dynamic_call:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3795
diff changeset
   455
    call(op, relocInfo::static_call_type);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
  case lir_optvirtual_call:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3795
diff changeset
   458
    call(op, relocInfo::opt_virtual_call_type);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
  case lir_icvirtual_call:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3795
diff changeset
   461
    ic_call(op);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
    break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
  case lir_virtual_call:
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3795
diff changeset
   464
    vtable_call(op);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
    break;
13487
75aa4880b15f 7192167: JSR 292: C1 has old broken code which needs to be removed
twisti
parents: 12739
diff changeset
   466
  default:
33105
294e48b4f704 8080775: Better argument formatting for assert() and friends
david
parents: 32203
diff changeset
   467
    fatal("unexpected op code: %s", op->name());
13487
75aa4880b15f 7192167: JSR 292: C1 has old broken code which needs to be removed
twisti
parents: 12739
diff changeset
   468
    break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  }
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 3795
diff changeset
   470
6186
7eef4cda471c 6975855: don't emit deopt MH handler in C1 if not required
twisti
parents: 5702
diff changeset
   471
  // JSR 292
7eef4cda471c 6975855: don't emit deopt MH handler in C1 if not required
twisti
parents: 5702
diff changeset
   472
  // Record if this method has MethodHandle invokes.
7eef4cda471c 6975855: don't emit deopt MH handler in C1 if not required
twisti
parents: 5702
diff changeset
   473
  if (op->is_method_handle_invoke()) {
7eef4cda471c 6975855: don't emit deopt MH handler in C1 if not required
twisti
parents: 5702
diff changeset
   474
    compilation()->set_has_method_handle_invokes(true);
7eef4cda471c 6975855: don't emit deopt MH handler in C1 if not required
twisti
parents: 5702
diff changeset
   475
  }
7eef4cda471c 6975855: don't emit deopt MH handler in C1 if not required
twisti
parents: 5702
diff changeset
   476
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 1
diff changeset
   477
#if defined(X86) && defined(TIERED)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
  // C2 leave fpu stack dirty clean it
489c9b5090e2 Initial load
duke
parents:
diff changeset
   479
  if (UseSSE < 2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
    int i;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
    for ( i = 1; i <= 7 ; i++ ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
      ffree(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
    if (!op->result_opr()->is_float_kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
      ffree(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
  }
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 1
diff changeset
   488
#endif // X86 && TIERED
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
  _masm->bind (*(op->label()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
void LIR_Assembler::emit_op1(LIR_Op1* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
  switch (op->code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
    case lir_move:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   500
      if (op->move_kind() == lir_move_volatile) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
        assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
        volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
        move_op(op->in_opr(), op->result_opr(), op->type(),
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   505
                op->patch_code(), op->info(), op->pop_fpu_stack(),
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   506
                op->move_kind() == lir_move_unaligned,
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   507
                op->move_kind() == lir_move_wide);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   509
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   510
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
    case lir_roundfp: {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
      LIR_OpRoundFP* round_op = op->as_OpRoundFP();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
      roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   516
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
    case lir_return:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
      return_op(op->in_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
    case lir_safepoint:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
      if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
        _masm->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
      safepoint_poll(op->in_opr(), op->info());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
    case lir_fxch:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
      fxch(op->in_opr()->as_jint());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
    case lir_fld:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
      fld(op->in_opr()->as_jint());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
    case lir_ffree:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
      ffree(op->in_opr()->as_jint());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
489c9b5090e2 Initial load
duke
parents:
diff changeset
   540
    case lir_branch:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   541
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
    case lir_push:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
      push(op->in_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
    case lir_pop:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
      pop(op->in_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
    case lir_neg:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
      negate(op->in_opr(), op->result_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
    case lir_leal:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
      leal(op->in_opr(), op->result_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
37291
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   559
    case lir_null_check: {
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   560
      ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
37291
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   562
      if (op->in_opr()->is_single_cpu()) {
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   563
        _masm->null_check(op->in_opr()->as_register(), stub->entry());
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   564
      } else {
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   565
        Unimplemented();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
      break;
37291
f13632a2a389 8151724: Remove -XX:GenerateCompilerNullChecks
thartmann
parents: 35540
diff changeset
   568
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
    case lir_monaddr:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
      monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
6453
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   574
#ifdef SPARC
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   575
    case lir_pack64:
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   576
      pack64(op->in_opr(), op->result_opr());
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   577
      break;
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   578
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   579
    case lir_unpack64:
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   580
      unpack64(op->in_opr(), op->result_opr());
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   581
      break;
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   582
#endif
970dc585ab63 6953144: Tiered compilation
iveresov
parents: 6186
diff changeset
   583
5334
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   584
    case lir_unwind:
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   585
      unwind_op(op->in_opr());
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   586
      break;
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   587
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   589
      Unimplemented();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   591
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
489c9b5090e2 Initial load
duke
parents:
diff changeset
   595
void LIR_Assembler::emit_op0(LIR_Op0* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   596
  switch (op->code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   597
    case lir_word_align: {
32203
01a3716ed455 8131682: C1 should use multibyte nops everywhere
shade
parents: 32082
diff changeset
   598
      _masm->align(BytesPerWord);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   600
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   601
489c9b5090e2 Initial load
duke
parents:
diff changeset
   602
    case lir_nop:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   603
      assert(op->info() == NULL, "not supported");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   604
      _masm->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   605
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
    case lir_label:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
      Unimplemented();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
    case lir_build_frame:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
      build_frame();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
    case lir_std_entry:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
      // init offsets
489c9b5090e2 Initial load
duke
parents:
diff changeset
   617
      offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   618
      _masm->align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   619
      if (needs_icache(compilation()->method())) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
        check_icache();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   621
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   622
      offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
      _masm->verified_entry();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
      build_frame();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
      offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
    case lir_osr_entry:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
      offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
      osr_entry();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   632
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
    case lir_24bit_FPU:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
      set_24bit_FPU();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
    case lir_reset_FPU:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
      reset_FPU();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
489c9b5090e2 Initial load
duke
parents:
diff changeset
   641
    case lir_breakpoint:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   642
      breakpoint();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   643
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   644
489c9b5090e2 Initial load
duke
parents:
diff changeset
   645
    case lir_fpop_raw:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   646
      fpop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   647
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
    case lir_membar:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
      membar();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
489c9b5090e2 Initial load
duke
parents:
diff changeset
   653
    case lir_membar_acquire:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
      membar_acquire();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
    case lir_membar_release:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
      membar_release();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   660
11886
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   661
    case lir_membar_loadload:
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   662
      membar_loadload();
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   663
      break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   664
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   665
    case lir_membar_storestore:
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   666
      membar_storestore();
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   667
      break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   668
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   669
    case lir_membar_loadstore:
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   670
      membar_loadstore();
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   671
      break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   672
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   673
    case lir_membar_storeload:
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   674
      membar_storeload();
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   675
      break;
feebf5c9f40c 7120481: storeStore barrier in constructor with final field
jiangli
parents: 10505
diff changeset
   676
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   677
    case lir_get_thread:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
      get_thread(op->result_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   680
38017
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 37291
diff changeset
   681
    case lir_on_spin_wait:
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 37291
diff changeset
   682
      on_spin_wait();
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 37291
diff changeset
   683
      break;
55047d16f141 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
ikrylov
parents: 37291
diff changeset
   684
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   685
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   686
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   687
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   688
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   689
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
void LIR_Assembler::emit_op2(LIR_Op2* op) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   693
  switch (op->code()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   694
    case lir_cmp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   695
      if (op->info() != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   696
        assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
               "shouldn't be codeemitinfo for non-address operands");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   698
        add_debug_info_for_null_check_here(op->info()); // exception possible
489c9b5090e2 Initial load
duke
parents:
diff changeset
   699
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   700
      comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   701
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   702
489c9b5090e2 Initial load
duke
parents:
diff changeset
   703
    case lir_cmp_l2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   704
    case lir_cmp_fd2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   705
    case lir_ucmp_fd2i:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   706
      comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   707
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   708
489c9b5090e2 Initial load
duke
parents:
diff changeset
   709
    case lir_cmove:
7713
1e06d2419258 7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents: 7427
diff changeset
   710
      cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   711
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   712
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
    case lir_shl:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   714
    case lir_shr:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   715
    case lir_ushr:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   716
      if (op->in_opr2()->is_constant()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   717
        shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   718
      } else {
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11886
diff changeset
   719
        shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   721
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
489c9b5090e2 Initial load
duke
parents:
diff changeset
   723
    case lir_add:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
    case lir_sub:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   725
    case lir_mul:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
    case lir_mul_strictfp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   727
    case lir_div:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
    case lir_div_strictfp:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
    case lir_rem:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
      assert(op->fpu_pop_count() < 2, "");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   731
      arith_op(
489c9b5090e2 Initial load
duke
parents:
diff changeset
   732
        op->code(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   733
        op->in_opr1(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   734
        op->in_opr2(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   735
        op->result_opr(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   736
        op->info(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   737
        op->fpu_pop_count() == 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
    case lir_abs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
    case lir_sqrt:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   742
    case lir_tan:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
    case lir_log10:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
      intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   745
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   746
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
    case lir_logic_and:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
    case lir_logic_or:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
    case lir_logic_xor:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
      logic_op(
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
        op->code(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
        op->in_opr1(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
        op->in_opr2(),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
        op->result_opr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
489c9b5090e2 Initial load
duke
parents:
diff changeset
   757
    case lir_throw:
5334
b2d040a8d375 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 5052
diff changeset
   758
      throw_op(op->in_opr1(), op->in_opr2(), op->info());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   759
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
13886
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13728
diff changeset
   761
    case lir_xadd:
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13728
diff changeset
   762
    case lir_xchg:
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13728
diff changeset
   763
      atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13728
diff changeset
   764
      break;
8d82c4dfa722 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents: 13728
diff changeset
   765
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
    default:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
      Unimplemented();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
      break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
void LIR_Assembler::build_frame() {
24018
77b156916bab 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 22244
diff changeset
   774
  _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
489c9b5090e2 Initial load
duke
parents:
diff changeset
   777
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   779
  assert((src->is_single_fpu() && dest->is_single_stack()) ||
489c9b5090e2 Initial load
duke
parents:
diff changeset
   780
         (src->is_double_fpu() && dest->is_double_stack()),
489c9b5090e2 Initial load
duke
parents:
diff changeset
   781
         "round_fp: rounds register -> stack location");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   782
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
  reg2stack (src, dest, src->type(), pop_fpu_stack);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   784
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   785
489c9b5090e2 Initial load
duke
parents:
diff changeset
   786
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   787
void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   788
  if (src->is_register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   789
    if (dest->is_register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   790
      assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   791
      reg2reg(src,  dest);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   792
    } else if (dest->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   793
      assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   794
      reg2stack(src, dest, type, pop_fpu_stack);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   795
    } else if (dest->is_address()) {
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   796
      reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   797
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   798
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   799
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   800
489c9b5090e2 Initial load
duke
parents:
diff changeset
   801
  } else if (src->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   802
    assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   803
    if (dest->is_register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   804
      stack2reg(src, dest, type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   805
    } else if (dest->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   806
      stack2stack(src, dest, type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   807
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   808
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   810
489c9b5090e2 Initial load
duke
parents:
diff changeset
   811
  } else if (src->is_constant()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   812
    if (dest->is_register()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   813
      const2reg(src, dest, patch_code, info); // patching is possible
489c9b5090e2 Initial load
duke
parents:
diff changeset
   814
    } else if (dest->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   815
      assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   816
      const2stack(src, dest);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   817
    } else if (dest->is_address()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   818
      assert(patch_code == lir_patch_none, "no patching allowed here");
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   819
      const2mem(src, dest, type, info, wide);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   820
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   821
      ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   822
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   823
489c9b5090e2 Initial load
duke
parents:
diff changeset
   824
  } else if (src->is_address()) {
7427
d7b79a367474 6985015: C1 needs to support compressed oops
iveresov
parents: 7397
diff changeset
   825
    mem2reg(src, dest, type, patch_code, info, wide, unaligned);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   828
    ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   829
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   830
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   831
489c9b5090e2 Initial load
duke
parents:
diff changeset
   832
489c9b5090e2 Initial load
duke
parents:
diff changeset
   833
void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   834
#ifndef PRODUCT
22244
0fdd928b5b64 8011391: C1: assert(code_offset() - offset == NativeInstruction::nop_instruction_size) failed: only one instruction can go in a delay slot
adlertz
parents: 22234
diff changeset
   835
  if (VerifyOops) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
    OopMapStream s(info->oop_map());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   837
    while (!s.is_done()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   838
      OopMapValue v = s.current();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   839
      if (v.is_oop()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   840
        VMReg r = v.reg();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   841
        if (!r->is_stack()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   842
          stringStream st;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   843
          st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   844
#ifdef SPARC
25949
34557722059b 6424123: JVM crashes on failed 'strdup' call
zgu
parents: 25715
diff changeset
   845
          _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   846
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   847
          _masm->verify_oop(r->as_Register());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   849
        } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   850
          _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   851
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   852
      }
9107
8ac339c8f87f 6528013: C1 CTW failure with -XX:+VerifyOops assert(allocates2(pc),"")
never
parents: 8107
diff changeset
   853
      check_codespace();
8ac339c8f87f 6528013: C1 CTW failure with -XX:+VerifyOops assert(allocates2(pc),"")
never
parents: 8107
diff changeset
   854
      CHECK_BAILOUT();
8ac339c8f87f 6528013: C1 CTW failure with -XX:+VerifyOops assert(allocates2(pc),"")
never
parents: 8107
diff changeset
   855
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
      s.next();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   860
}