src/hotspot/os_cpu/bsd_x86/prefetch_bsd_x86.inline.hpp
author pliden
Thu, 07 Nov 2019 15:48:43 +0100
changeset 58965 86c8b22945a1
parent 53244 9807daeb47c4
permissions -rw-r--r--
8233793: ZGC: Incorrect type used in ZBarrierSetC2 clone_type() Reviewed-by: eosterlund
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/*
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 * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef OS_CPU_BSD_X86_PREFETCH_BSD_X86_INLINE_HPP
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#define OS_CPU_BSD_X86_PREFETCH_BSD_X86_INLINE_HPP
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#include "runtime/prefetch.hpp"
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inline void Prefetch::read (void *loc, intx interval) {
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#ifdef AMD64
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  __asm__ ("prefetcht0 (%0,%1,1)" : : "r" (loc), "r" (interval));
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#endif // AMD64
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}
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inline void Prefetch::write(void *loc, intx interval) {
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#ifdef AMD64
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  // Do not use the 3dnow prefetchw instruction.  It isn't supported on em64t.
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  //  __asm__ ("prefetchw (%0,%1,1)" : : "r" (loc), "r" (interval));
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  __asm__ ("prefetcht0 (%0,%1,1)" : : "r" (loc), "r" (interval));
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#endif // AMD64
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}
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#endif // OS_CPU_BSD_X86_PREFETCH_BSD_X86_INLINE_HPP