hotspot/src/os_cpu/bsd_zero/vm/orderAccess_bsd_zero.inline.hpp
author lana
Mon, 16 Jul 2012 14:49:27 -0700
changeset 13239 7bea6829e8d6
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child 25715 d5a8dbdc5150
permissions -rw-r--r--
Merge
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/*
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 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
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 * Copyright 2007, 2008, 2009 Red Hat, Inc.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
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#define OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
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#include "runtime/orderAccess.hpp"
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#include "vm_version_zero.hpp"
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#ifdef ARM
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/*
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 * ARM Kernel helper for memory barrier.
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 * Using __asm __volatile ("":::"memory") does not work reliable on ARM
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 * and gcc __sync_synchronize(); implementation does not use the kernel
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 * helper for all gcc versions so it is unreliable to use as well.
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 */
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typedef void (__kernel_dmb_t) (void);
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#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
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#define FULL_MEM_BARRIER __kernel_dmb()
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#define READ_MEM_BARRIER __kernel_dmb()
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#define WRITE_MEM_BARRIER __kernel_dmb()
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#else // ARM
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#define FULL_MEM_BARRIER __sync_synchronize()
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#ifdef PPC
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#ifdef __NO_LWSYNC__
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#define READ_MEM_BARRIER __asm __volatile ("sync":::"memory")
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#define WRITE_MEM_BARRIER __asm __volatile ("sync":::"memory")
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#else
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#define READ_MEM_BARRIER __asm __volatile ("lwsync":::"memory")
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#define WRITE_MEM_BARRIER __asm __volatile ("lwsync":::"memory")
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#endif
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#else // PPC
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#define READ_MEM_BARRIER __asm __volatile ("":::"memory")
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#define WRITE_MEM_BARRIER __asm __volatile ("":::"memory")
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#endif // PPC
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#endif // ARM
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inline void OrderAccess::loadload()   { acquire(); }
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inline void OrderAccess::storestore() { release(); }
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inline void OrderAccess::loadstore()  { acquire(); }
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inline void OrderAccess::storeload()  { fence(); }
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inline void OrderAccess::acquire() {
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  READ_MEM_BARRIER;
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}
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inline void OrderAccess::release() {
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  WRITE_MEM_BARRIER;
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}
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inline void OrderAccess::fence() {
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  FULL_MEM_BARRIER;
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}
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inline jbyte    OrderAccess::load_acquire(volatile jbyte*   p) { jbyte data = *p; acquire(); return data; }
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inline jshort   OrderAccess::load_acquire(volatile jshort*  p) { jshort data = *p; acquire(); return data; }
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inline jint     OrderAccess::load_acquire(volatile jint*    p) { jint data = *p; acquire(); return data; }
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inline jlong    OrderAccess::load_acquire(volatile jlong*   p) {
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  jlong tmp;
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  os::atomic_copy64(p, &tmp);
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  acquire();
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  return tmp;
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}
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inline jubyte    OrderAccess::load_acquire(volatile jubyte*   p) { jubyte data = *p; acquire(); return data; }
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inline jushort   OrderAccess::load_acquire(volatile jushort*  p) { jushort data = *p; acquire(); return data; }
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inline juint     OrderAccess::load_acquire(volatile juint*    p) { juint data = *p; acquire(); return data; }
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inline julong   OrderAccess::load_acquire(volatile julong*  p) {
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  julong tmp;
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  os::atomic_copy64(p, &tmp);
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  acquire();
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  return tmp;
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}
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inline jfloat   OrderAccess::load_acquire(volatile jfloat*  p) { jfloat data = *p; acquire(); return data; }
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inline jdouble  OrderAccess::load_acquire(volatile jdouble* p) {
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  jdouble tmp;
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  os::atomic_copy64(p, &tmp);
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  acquire();
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  return tmp;
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}
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inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t*   p) {
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  intptr_t data = *p;
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  acquire();
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  return data;
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}
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inline void*    OrderAccess::load_ptr_acquire(volatile void*       p) {
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  void *data = *(void* volatile *)p;
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  acquire();
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  return data;
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}
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inline void*    OrderAccess::load_ptr_acquire(const volatile void* p) {
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  void *data = *(void* const volatile *)p;
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  acquire();
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  return data;
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}
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inline void     OrderAccess::release_store(volatile jbyte*   p, jbyte   v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jshort*  p, jshort  v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jint*    p, jint    v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jlong*   p, jlong   v)
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{ release(); os::atomic_copy64(&v, p); }
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inline void     OrderAccess::release_store(volatile jubyte*  p, jubyte  v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jushort* p, jushort v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile juint*   p, juint   v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile julong*  p, julong  v)
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{ release(); os::atomic_copy64(&v, p); }
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inline void     OrderAccess::release_store(volatile jfloat*  p, jfloat  v) { release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jdouble* p, jdouble v)
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{ release(); os::atomic_copy64(&v, p); }
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inline void     OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { release(); *p = v; }
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inline void     OrderAccess::release_store_ptr(volatile void*     p, void*    v)
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{ release(); *(void* volatile *)p = v; }
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inline void     OrderAccess::store_fence(jbyte*   p, jbyte   v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(jshort*  p, jshort  v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(jint*    p, jint    v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(jlong*   p, jlong   v) { os::atomic_copy64(&v, p); fence(); }
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inline void     OrderAccess::store_fence(jubyte*  p, jubyte  v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(jushort* p, jushort v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(juint*   p, juint   v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(julong*  p, julong  v) { os::atomic_copy64(&v, p); fence(); }
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inline void     OrderAccess::store_fence(jfloat*  p, jfloat  v) { *p = v; fence(); }
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inline void     OrderAccess::store_fence(jdouble* p, jdouble v) { os::atomic_copy64(&v, p); fence(); }
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inline void     OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { *p = v; fence(); }
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inline void     OrderAccess::store_ptr_fence(void**    p, void*    v) { *p = v; fence(); }
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inline void     OrderAccess::release_store_fence(volatile jbyte*   p, jbyte   v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jshort*  p, jshort  v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jint*    p, jint    v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jlong*   p, jlong   v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jubyte*  p, jubyte  v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile juint*   p, juint   v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile julong*  p, julong  v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jfloat*  p, jfloat  v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { release_store(p, v); fence(); }
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inline void     OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { release_store_ptr(p, v); fence(); }
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inline void     OrderAccess::release_store_ptr_fence(volatile void*     p, void*    v) { release_store_ptr(p, v); fence(); }
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#endif // OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP