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/*
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* Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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private:
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// Sparc load/store emission
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//
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// The sparc ld/st instructions cannot accomodate displacements > 13 bits long.
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// The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode
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// by allowing 32 bit displacements:
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//
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// When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]).
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// When disp > 13 bits long, code is emitted to set the displacement into the O7 register,
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// and then a load or store is emitted with ([O7] + [d]).
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//
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// some load/store variants return the code_offset for proper positioning of debug info for null checks
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// load/store with 32 bit displacement
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int load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
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void store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info = NULL);
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// loadf/storef with 32 bit displacement
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void load(Register s, int disp, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL);
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void store(FloatRegister d, Register s1, int disp, BasicType st_type, CodeEmitInfo* info = NULL);
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// convienence methods for calling load/store with an Address
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void load(const Address& a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0);
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void store(Register d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0);
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void load(const Address& a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0);
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void store(FloatRegister d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0);
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// convienence methods for calling load/store with an LIR_Address
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void load(LIR_Address* a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
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void store(Register d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL);
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void load(LIR_Address* a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL);
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void store(FloatRegister d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL);
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int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool unaligned = false);
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int store(LIR_Opr from_reg, Register base, Register disp, BasicType type);
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int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool unaligned = false);
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int load(Register base, Register disp, LIR_Opr to_reg, BasicType type);
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void monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register hdr, int monitor_no);
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int shift_amount(BasicType t);
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static bool is_single_instruction(LIR_Op* op);
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public:
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void pack64( Register rs, Register rd );
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void unpack64( Register rd );
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enum {
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#ifdef _LP64
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call_stub_size = 68,
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#else
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call_stub_size = 20,
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#endif // _LP64
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exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4),
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deopt_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4) };
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