hotspot/src/os_cpu/linux_ppc/vm/orderAccess_linux_ppc.inline.hpp
author lana
Fri, 18 Jul 2014 08:25:26 -0700
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child 25715 d5a8dbdc5150
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Merge
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/*
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 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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 * Copyright 2012, 2013 SAP AG. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
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#define OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
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#include "runtime/orderAccess.hpp"
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#include "vm_version_ppc.hpp"
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#ifndef PPC64
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#error "OrderAccess currently only implemented for PPC64"
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#endif
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// Implementation of class OrderAccess.
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//
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// Machine barrier instructions:
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//
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// - sync            Two-way memory barrier, aka fence.
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// - lwsync          orders  Store|Store,
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//                            Load|Store,
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//                            Load|Load,
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//                   but not Store|Load
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// - eieio           orders  Store|Store
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// - isync           Invalidates speculatively executed instructions,
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//                   but isync may complete before storage accesses
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//                   associated with instructions preceding isync have
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//                   been performed.
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//
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// Semantic barrier instructions:
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// (as defined in orderAccess.hpp)
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//
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// - release         orders Store|Store,       (maps to lwsync)
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//                           Load|Store
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// - acquire         orders  Load|Store,       (maps to lwsync)
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//                           Load|Load
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// - fence           orders Store|Store,       (maps to sync)
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//                           Load|Store,
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//                           Load|Load,
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//                          Store|Load
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//
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#define inlasm_sync()     __asm__ __volatile__ ("sync"   : : : "memory");
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#define inlasm_lwsync()   __asm__ __volatile__ ("lwsync" : : : "memory");
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#define inlasm_eieio()    __asm__ __volatile__ ("eieio"  : : : "memory");
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#define inlasm_isync()    __asm__ __volatile__ ("isync"  : : : "memory");
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#define inlasm_release()  inlasm_lwsync();
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#define inlasm_acquire()  inlasm_lwsync();
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// Use twi-isync for load_acquire (faster than lwsync).
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#define inlasm_acquire_reg(X) __asm__ __volatile__ ("twi 0,%0,0\n isync\n" : : "r" (X) : "memory");
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#define inlasm_fence()    inlasm_sync();
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inline void     OrderAccess::loadload()   { inlasm_lwsync();  }
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inline void     OrderAccess::storestore() { inlasm_lwsync();  }
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inline void     OrderAccess::loadstore()  { inlasm_lwsync();  }
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inline void     OrderAccess::storeload()  { inlasm_fence();   }
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inline void     OrderAccess::acquire()    { inlasm_acquire(); }
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inline void     OrderAccess::release()    { inlasm_release(); }
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inline void     OrderAccess::fence()      { inlasm_fence();   }
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inline jbyte    OrderAccess::load_acquire(volatile jbyte*   p) { register jbyte t = *p;   inlasm_acquire_reg(t); return t; }
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inline jshort   OrderAccess::load_acquire(volatile jshort*  p) { register jshort t = *p;  inlasm_acquire_reg(t); return t; }
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inline jint     OrderAccess::load_acquire(volatile jint*    p) { register jint t = *p;    inlasm_acquire_reg(t); return t; }
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inline jlong    OrderAccess::load_acquire(volatile jlong*   p) { register jlong t = *p;   inlasm_acquire_reg(t); return t; }
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inline jubyte   OrderAccess::load_acquire(volatile jubyte*  p) { register jubyte t = *p;  inlasm_acquire_reg(t); return t; }
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inline jushort  OrderAccess::load_acquire(volatile jushort* p) { register jushort t = *p; inlasm_acquire_reg(t); return t; }
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inline juint    OrderAccess::load_acquire(volatile juint*   p) { register juint t = *p;   inlasm_acquire_reg(t); return t; }
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inline julong   OrderAccess::load_acquire(volatile julong*  p) { return (julong)load_acquire((volatile jlong*)p); }
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inline jfloat   OrderAccess::load_acquire(volatile jfloat*  p) { register jfloat t = *p;  inlasm_acquire(); return t; }
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inline jdouble  OrderAccess::load_acquire(volatile jdouble* p) { register jdouble t = *p; inlasm_acquire(); return t; }
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inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t*   p) { return (intptr_t)load_acquire((volatile jlong*)p); }
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inline void*    OrderAccess::load_ptr_acquire(volatile void*       p) { return (void*)   load_acquire((volatile jlong*)p); }
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inline void*    OrderAccess::load_ptr_acquire(const volatile void* p) { return (void*)   load_acquire((volatile jlong*)p); }
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inline void     OrderAccess::release_store(volatile jbyte*   p, jbyte   v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jshort*  p, jshort  v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jint*    p, jint    v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jlong*   p, jlong   v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jubyte*  p, jubyte  v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jushort* p, jushort v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile juint*   p, juint   v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile julong*  p, julong  v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jfloat*  p, jfloat  v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store(volatile jdouble* p, jdouble v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { inlasm_release(); *p = v; }
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inline void     OrderAccess::release_store_ptr(volatile void*     p, void*    v) { inlasm_release(); *(void* volatile *)p = v; }
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inline void     OrderAccess::store_fence(jbyte*   p, jbyte   v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jshort*  p, jshort  v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jint*    p, jint    v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jlong*   p, jlong   v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jubyte*  p, jubyte  v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jushort* p, jushort v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(juint*   p, juint   v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(julong*  p, julong  v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jfloat*  p, jfloat  v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::store_ptr_fence(void**    p, void*    v) { *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jbyte*   p, jbyte   v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jshort*  p, jshort  v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jint*    p, jint    v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jlong*   p, jlong   v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jubyte*  p, jubyte  v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jushort* p, jushort v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile juint*   p, juint   v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile julong*  p, julong  v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jfloat*  p, jfloat  v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { inlasm_release(); *p = v; inlasm_fence(); }
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inline void     OrderAccess::release_store_ptr_fence(volatile void*     p, void*    v) { inlasm_release(); *(void* volatile *)p = v; inlasm_fence(); }
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#undef inlasm_sync
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#undef inlasm_lwsync
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#undef inlasm_eieio
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#undef inlasm_isync
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#undef inlasm_release
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#undef inlasm_acquire
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#undef inlasm_fence
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#endif // OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP