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!!
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!! Copyright 2005-2007 Sun Microsystems, Inc. All Rights Reserved.
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!! DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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!!
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!! This code is free software; you can redistribute it and/or modify it
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!! under the terms of the GNU General Public License version 2 only, as
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!! published by the Free Software Foundation.
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!!
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!! This code is distributed in the hope that it will be useful, but WITHOUT
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!! ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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!! FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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!! version 2 for more details (a copy is included in the LICENSE file that
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!! accompanied this code).
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!!
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!! You should have received a copy of the GNU General Public License version
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!! 2 along with this work; if not, write to the Free Software Foundation,
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!! Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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!!
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!! Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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!! CA 95054 USA or visit www.sun.com if you need additional information or
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!! have any questions.
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!!
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!! Prototype: int SafeFetch32 (int * adr, int ErrValue)
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!! The "ld" at Fetch32 is potentially faulting instruction.
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!! If the instruction traps the trap handler will arrange
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!! for control to resume at Fetch32Resume.
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!! By convention with the trap handler we ensure there is a non-CTI
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!! instruction in the trap shadow.
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!!
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!! The reader might be tempted to move this service to .il.
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!! Don't. Sun's CC back-end reads and optimize code emitted
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!! by the .il "call", in some cases optimizing the code, completely eliding it,
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!! or by moving the code from the "call site".
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.globl SafeFetch32
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.align 32
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.global Fetch32PFI, Fetch32Resume
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SafeFetch32:
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mov %o0, %g1
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mov %o1, %o0
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Fetch32PFI:
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ld [%g1], %o0 !! <-- Potentially faulting instruction
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Fetch32Resume:
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nop
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retl
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nop
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.globl SafeFetchN
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.align 32
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.globl FetchNPFI, FetchNResume
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SafeFetchN:
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mov %o0, %g1
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mov %o1, %o0
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FetchNPFI:
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ldn [%g1], %o0
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FetchNResume:
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nop
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retl
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nop
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!! Possibilities:
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!! -- membar
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!! -- CAS (SP + BIAS, G0, G0)
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!! -- wr %g0, %asi
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.global SpinPause
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.align 32
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SpinPause:
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retl
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mov %g0, %o0
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.globl _Copy_conjoint_jlongs_atomic
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.align 32
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.global _Copy_conjoint_jlongs_atomic
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_Copy_conjoint_jlongs_atomic:
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cmp %o0, %o1
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bleu 4f
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sll %o2, 3, %o4
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ba 2f
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1:
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subcc %o4, 8, %o4
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std %o2, [%o1]
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add %o0, 8, %o0
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add %o1, 8, %o1
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2:
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bge,a 1b
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ldd [%o0], %o2
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ba 5f
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nop
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3:
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std %o2, [%o1+%o4]
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4:
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subcc %o4, 8, %o4
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bge,a 3b
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ldd [%o0+%o4], %o2
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5:
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retl
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nop
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.globl _raw_thread_id
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.align 32
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_raw_thread_id:
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retl
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mov %g7, %o0
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.globl _flush_reg_windows
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.align 32
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_flush_reg_windows:
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ta 0x03
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retl
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mov %fp, %o0
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