src/hotspot/cpu/ppc/gc/g1/g1BarrierSetAssembler_ppc.cpp
author stuefe
Thu, 12 Apr 2018 11:05:42 +0200
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permissions -rw-r--r--
8201475: 8199417 breaks AIX and non-pch on s390 (and presumably aarch64) Reviewed-by: eosterlund, shade, mdoerr
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/*
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 * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
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 * Copyright (c) 2018, SAP SE. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "gc/g1/g1BarrierSet.hpp"
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#include "gc/g1/g1CardTable.hpp"
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#include "gc/g1/g1BarrierSetAssembler.hpp"
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#include "gc/g1/g1ThreadLocalData.hpp"
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#include "gc/g1/heapRegion.hpp"
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#include "gc/shared/collectedHeap.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "runtime/sharedRuntime.hpp"
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#define __ masm->
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void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
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                                                            Register from, Register to, Register count,
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                                                            Register preserve1, Register preserve2) {
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  bool dest_uninitialized = (decorators & AS_DEST_NOT_INITIALIZED) != 0;
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  // With G1, don't generate the call if we statically know that the target in uninitialized
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  if (!dest_uninitialized) {
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    int spill_slots = 3;
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    if (preserve1 != noreg) { spill_slots++; }
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    if (preserve2 != noreg) { spill_slots++; }
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    const int frame_size = align_up(frame::abi_reg_args_size + spill_slots * BytesPerWord, frame::alignment_in_bytes);
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    Label filtered;
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    // Is marking active?
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    if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
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      __ lwz(R0, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()), R16_thread);
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    } else {
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      guarantee(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
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      __ lbz(R0, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()), R16_thread);
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    }
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    __ cmpdi(CCR0, R0, 0);
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    __ beq(CCR0, filtered);
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    __ save_LR_CR(R0);
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    __ push_frame(frame_size, R0);
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    int slot_nr = 0;
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    __ std(from,  frame_size - (++slot_nr) * wordSize, R1_SP);
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    __ std(to,    frame_size - (++slot_nr) * wordSize, R1_SP);
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    __ std(count, frame_size - (++slot_nr) * wordSize, R1_SP);
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    if (preserve1 != noreg) { __ std(preserve1, frame_size - (++slot_nr) * wordSize, R1_SP); }
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    if (preserve2 != noreg) { __ std(preserve2, frame_size - (++slot_nr) * wordSize, R1_SP); }
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    if (UseCompressedOops) {
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      __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry), to, count);
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    } else {
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      __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry), to, count);
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    }
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    slot_nr = 0;
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    __ ld(from,  frame_size - (++slot_nr) * wordSize, R1_SP);
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    __ ld(to,    frame_size - (++slot_nr) * wordSize, R1_SP);
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    __ ld(count, frame_size - (++slot_nr) * wordSize, R1_SP);
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    if (preserve1 != noreg) { __ ld(preserve1, frame_size - (++slot_nr) * wordSize, R1_SP); }
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    if (preserve2 != noreg) { __ ld(preserve2, frame_size - (++slot_nr) * wordSize, R1_SP); }
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    __ addi(R1_SP, R1_SP, frame_size); // pop_frame()
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    __ restore_LR_CR(R0);
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    __ bind(filtered);
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  }
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}
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void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
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                                                             Register addr, Register count, Register preserve) {
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  int spill_slots = (preserve != noreg) ? 1 : 0;
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  const int frame_size = align_up(frame::abi_reg_args_size + spill_slots * BytesPerWord, frame::alignment_in_bytes);
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  __ save_LR_CR(R0);
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  __ push_frame(frame_size, R0);
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  if (preserve != noreg) { __ std(preserve, frame_size - 1 * wordSize, R1_SP); }
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  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry), addr, count);
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  if (preserve != noreg) { __ ld(preserve, frame_size - 1 * wordSize, R1_SP); }
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  __ addi(R1_SP, R1_SP, frame_size); // pop_frame();
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  __ restore_LR_CR(R0);
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}
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void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm, DecoratorSet decorators, Register obj, RegisterOrConstant ind_or_offs, Register pre_val,
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                                                 Register tmp1, Register tmp2, bool needs_frame) {
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  bool not_null  = (decorators & OOP_NOT_NULL) != 0,
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       preloaded = obj == noreg;
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  Register nv_save = noreg;
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  if (preloaded) {
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    // We are not loading the previous value so make
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    // sure that we don't trash the value in pre_val
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    // with the code below.
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    assert_different_registers(pre_val, tmp1, tmp2);
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    if (pre_val->is_volatile()) {
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      nv_save = !tmp1->is_volatile() ? tmp1 : tmp2;
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      assert(!nv_save->is_volatile(), "need one nv temp register if pre_val lives in volatile register");
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    }
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  }
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  Label runtime, filtered;
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  // Is marking active?
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  if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
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    __ lwz(tmp1, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()), R16_thread);
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  } else {
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    guarantee(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
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    __ lbz(tmp1, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()), R16_thread);
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  }
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  __ cmpdi(CCR0, tmp1, 0);
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  __ beq(CCR0, filtered);
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  // Do we need to load the previous value?
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  if (!preloaded) {
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    // Load the previous value...
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    if (UseCompressedOops) {
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      __ lwz(pre_val, ind_or_offs, obj);
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    } else {
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      __ ld(pre_val, ind_or_offs, obj);
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    }
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    // Previous value has been loaded into Rpre_val.
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  }
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  assert(pre_val != noreg, "must have a real register");
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  // Is the previous value null?
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  if (preloaded && not_null) {
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#ifdef ASSERT
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    __ cmpdi(CCR0, pre_val, 0);
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    __ asm_assert_ne("null oop not allowed (G1 pre)", 0x321); // Checked by caller.
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#endif
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  } else {
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    __ cmpdi(CCR0, pre_val, 0);
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    __ beq(CCR0, filtered);
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  }
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  if (!preloaded && UseCompressedOops) {
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    __ decode_heap_oop_not_null(pre_val);
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  }
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  // OK, it's not filtered, so we'll need to call enqueue. In the normal
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  // case, pre_val will be a scratch G-reg, but there are some cases in
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  // which it's an O-reg. In the first case, do a normal call. In the
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  // latter, do a save here and call the frameless version.
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  // Can we store original value in the thread's buffer?
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  // Is index == 0?
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  // (The index field is typed as size_t.)
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  const Register Rbuffer = tmp1, Rindex = tmp2;
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  __ ld(Rindex, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()), R16_thread);
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  __ cmpdi(CCR0, Rindex, 0);
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  __ beq(CCR0, runtime); // If index == 0, goto runtime.
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  __ ld(Rbuffer, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()), R16_thread);
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  __ addi(Rindex, Rindex, -wordSize); // Decrement index.
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  __ std(Rindex, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()), R16_thread);
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  // Record the previous value.
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  __ stdx(pre_val, Rbuffer, Rindex);
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  __ b(filtered);
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  __ bind(runtime);
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  // May need to preserve LR. Also needed if current frame is not compatible with C calling convention.
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  if (needs_frame) {
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    __ save_LR_CR(tmp1);
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    __ push_frame_reg_args(0, tmp2);
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  }
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  if (pre_val->is_volatile() && preloaded) { __ mr(nv_save, pre_val); } // Save pre_val across C call if it was preloaded.
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  __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, R16_thread);
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  if (pre_val->is_volatile() && preloaded) { __ mr(pre_val, nv_save); } // restore
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  if (needs_frame) {
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    __ pop_frame();
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    __ restore_LR_CR(tmp1);
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  }
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  __ bind(filtered);
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}
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void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm, DecoratorSet decorators, Register store_addr, Register new_val,
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                                                  Register tmp1, Register tmp2, Register tmp3) {
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  bool not_null = (decorators & OOP_NOT_NULL) != 0;
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  Label runtime, filtered;
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  assert_different_registers(store_addr, new_val, tmp1, tmp2);
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  CardTableBarrierSet* ct = barrier_set_cast<CardTableBarrierSet>(Universe::heap()->barrier_set());
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  assert(sizeof(*ct->card_table()->byte_map_base()) == sizeof(jbyte), "adjust this code");
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  // Does store cross heap regions?
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  if (G1RSBarrierRegionFilter) {
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    __ xorr(tmp1, store_addr, new_val);
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    __ srdi_(tmp1, tmp1, HeapRegion::LogOfHRGrainBytes);
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    __ beq(CCR0, filtered);
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  }
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  // Crosses regions, storing NULL?
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  if (not_null) {
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#ifdef ASSERT
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    __ cmpdi(CCR0, new_val, 0);
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    __ asm_assert_ne("null oop not allowed (G1 post)", 0x322); // Checked by caller.
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#endif
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  } else {
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    __ cmpdi(CCR0, new_val, 0);
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    __ beq(CCR0, filtered);
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  }
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  // Storing region crossing non-NULL, is card already dirty?
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  const Register Rcard_addr = tmp1;
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  Register Rbase = tmp2;
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  __ load_const_optimized(Rbase, (address)(ct->card_table()->byte_map_base()), /*temp*/ tmp3);
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  __ srdi(Rcard_addr, store_addr, CardTable::card_shift);
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  // Get the address of the card.
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  __ lbzx(/*card value*/ tmp3, Rbase, Rcard_addr);
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  __ cmpwi(CCR0, tmp3, (int)G1CardTable::g1_young_card_val());
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  __ beq(CCR0, filtered);
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  __ membar(Assembler::StoreLoad);
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  __ lbzx(/*card value*/ tmp3, Rbase, Rcard_addr);  // Reload after membar.
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  __ cmpwi(CCR0, tmp3 /* card value */, (int)G1CardTable::dirty_card_val());
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  __ beq(CCR0, filtered);
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  // Storing a region crossing, non-NULL oop, card is clean.
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  // Dirty card and log.
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  __ li(tmp3, (int)G1CardTable::dirty_card_val());
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  //release(); // G1: oops are allowed to get visible after dirty marking.
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  __ stbx(tmp3, Rbase, Rcard_addr);
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  __ add(Rcard_addr, Rbase, Rcard_addr); // This is the address which needs to get enqueued.
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  Rbase = noreg; // end of lifetime
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  const Register Rqueue_index = tmp2,
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                 Rqueue_buf   = tmp3;
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  __ ld(Rqueue_index, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()), R16_thread);
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  __ cmpdi(CCR0, Rqueue_index, 0);
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  __ beq(CCR0, runtime); // index == 0 then jump to runtime
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  __ ld(Rqueue_buf, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()), R16_thread);
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  __ addi(Rqueue_index, Rqueue_index, -wordSize); // decrement index
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  __ std(Rqueue_index, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()), R16_thread);
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  __ stdx(Rcard_addr, Rqueue_buf, Rqueue_index); // store card
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  __ b(filtered);
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  __ bind(runtime);
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  // Save the live input values.
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  __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), Rcard_addr, R16_thread);
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  __ bind(filtered);
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}
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void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
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                                       Register base, RegisterOrConstant ind_or_offs, Register val,
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                                       Register tmp1, Register tmp2, Register tmp3, bool needs_frame) {
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  bool on_array = (decorators & IN_HEAP_ARRAY) != 0;
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  bool on_anonymous = (decorators & ON_UNKNOWN_OOP_REF) != 0;
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  bool precise = on_array || on_anonymous;
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  // Load and record the previous value.
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  g1_write_barrier_pre(masm, decorators, base, ind_or_offs,
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                       tmp1, tmp2, tmp3, needs_frame);
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  BarrierSetAssembler::store_at(masm, decorators, type, base, ind_or_offs, val, tmp1, tmp2, tmp3, needs_frame);
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  // No need for post barrier if storing NULL
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  if (val != noreg) {
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    if (precise) {
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      if (ind_or_offs.is_constant()) {
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        __ add_const_optimized(base, base, ind_or_offs.as_constant(), tmp1);
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      } else {
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        __ add(base, ind_or_offs.as_register(), base);
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      }
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    }
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    g1_write_barrier_post(masm, decorators, base, val, tmp1, tmp2, tmp3);
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  }
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}
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void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
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                                    Register base, RegisterOrConstant ind_or_offs, Register dst,
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                                    Register tmp1, Register tmp2, bool needs_frame, Label *is_null) {
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  bool on_oop = type == T_OBJECT || type == T_ARRAY;
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  bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
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  bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
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  bool on_reference = on_weak || on_phantom;
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  Label done;
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  if (on_oop && on_reference && is_null == NULL) { is_null = &done; }
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  // Load the value of the referent field.
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  ModRefBarrierSetAssembler::load_at(masm, decorators, type, base, ind_or_offs, dst, tmp1, tmp2, needs_frame, is_null);
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  if (on_oop && on_reference) {
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    // Generate the G1 pre-barrier code to log the value of
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    // the referent field in an SATB buffer. Note with
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    // these parameters the pre-barrier does not generate
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    // the load of the previous value
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    // We only reach here if value is not null.
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    g1_write_barrier_pre(masm, decorators | OOP_NOT_NULL, noreg /* obj */, (intptr_t)0, dst /* pre_val */,
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                         tmp1, tmp2, needs_frame);
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  }
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  __ bind(done);
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}
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void G1BarrierSetAssembler::resolve_jobject(MacroAssembler* masm, Register value, Register tmp1, Register tmp2, bool needs_frame) {
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  Label done, not_weak;
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  __ cmpdi(CCR0, value, 0);
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  __ beq(CCR0, done);         // Use NULL as-is.
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  __ clrrdi(tmp1, value, JNIHandles::weak_tag_size);
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  __ andi_(tmp2, value, JNIHandles::weak_tag_mask);
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  __ ld(value, 0, tmp1);      // Resolve (untagged) jobject.
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  __ beq(CCR0, not_weak);     // Test for jweak tag.
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  __ verify_oop(value);
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  g1_write_barrier_pre(masm, IN_ROOT | ON_PHANTOM_OOP_REF,
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                       noreg, noreg, value,
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                       tmp1, tmp2, needs_frame);
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  __ bind(not_weak);
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  __ verify_oop(value);
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  __ bind(done);
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}
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#undef __