hotspot/src/share/vm/c1/c1_FpuStackSim.hpp
author roland
Fri, 23 Dec 2011 09:36:23 +0100
changeset 11433 2a2e375199de
parent 8921 14bfe81f2a9d
child 29180 50369728b00e
permissions -rw-r--r--
7123253: C1: in store check code, usage of registers may be incorrect Summary: fix usage of input register in assembly code for store check. Reviewed-by: never
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/*
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 * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef SHARE_VM_C1_C1_FPUSTACKSIM_HPP
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#define SHARE_VM_C1_C1_FPUSTACKSIM_HPP
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#include "c1/c1_FrameMap.hpp"
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#include "memory/allocation.hpp"
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// Provides location for forward declaration of this class, which is
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// only implemented on Intel
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class FpuStackSim;
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#ifdef TARGET_ARCH_x86
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# include "c1_FpuStackSim_x86.hpp"
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#endif
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#ifdef TARGET_ARCH_sparc
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# include "c1_FpuStackSim_sparc.hpp"
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#endif
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#ifdef TARGET_ARCH_arm
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# include "c1_FpuStackSim_arm.hpp"
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#endif
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#ifdef TARGET_ARCH_ppc
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# include "c1_FpuStackSim_ppc.hpp"
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#endif
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#endif // SHARE_VM_C1_C1_FPUSTACKSIM_HPP