author | duke |
Wed, 05 Jul 2017 19:47:10 +0200 | |
changeset 25031 | 28dd0c7beb3c |
parent 24669 | 14439491d407 |
child 28954 | 7dda6c26cc98 |
child 29180 | 50369728b00e |
permissions | -rw-r--r-- |
1 | 1 |
/* |
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* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef SHARE_VM_C1_C1_LIR_HPP |
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#define SHARE_VM_C1_C1_LIR_HPP |
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#include "c1/c1_ValueType.hpp" |
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#include "oops/method.hpp" |
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class BlockBegin; |
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class BlockList; |
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class LIR_Assembler; |
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class CodeEmitInfo; |
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class CodeStub; |
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class CodeStubList; |
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class ArrayCopyStub; |
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class LIR_Op; |
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class ciType; |
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class ValueType; |
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class LIR_OpVisitState; |
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class FpuStackSim; |
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||
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//--------------------------------------------------------------------- |
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// LIR Operands |
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// LIR_OprDesc |
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// LIR_OprPtr |
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// LIR_Const |
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// LIR_Address |
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//--------------------------------------------------------------------- |
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class LIR_OprDesc; |
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class LIR_OprPtr; |
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class LIR_Const; |
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class LIR_Address; |
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class LIR_OprVisitor; |
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typedef LIR_OprDesc* LIR_Opr; |
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typedef int RegNr; |
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||
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define_array(LIR_OprArray, LIR_Opr) |
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define_stack(LIR_OprList, LIR_OprArray) |
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||
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define_array(LIR_OprRefArray, LIR_Opr*) |
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define_stack(LIR_OprRefList, LIR_OprRefArray) |
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define_array(CodeEmitInfoArray, CodeEmitInfo*) |
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define_stack(CodeEmitInfoList, CodeEmitInfoArray) |
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define_array(LIR_OpArray, LIR_Op*) |
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define_stack(LIR_OpList, LIR_OpArray) |
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// define LIR_OprPtr early so LIR_OprDesc can refer to it |
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class LIR_OprPtr: public CompilationResourceObj { |
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public: |
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bool is_oop_pointer() const { return (type() == T_OBJECT); } |
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bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } |
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virtual LIR_Const* as_constant() { return NULL; } |
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virtual LIR_Address* as_address() { return NULL; } |
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virtual BasicType type() const = 0; |
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virtual void print_value_on(outputStream* out) const = 0; |
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}; |
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// LIR constants |
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class LIR_Const: public LIR_OprPtr { |
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private: |
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JavaValue _value; |
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void type_check(BasicType t) const { assert(type() == t, "type check"); } |
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void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } |
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void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } |
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public: |
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LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } |
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LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } |
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LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } |
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LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } |
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LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } |
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LIR_Const(void* p) { |
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#ifdef _LP64 |
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assert(sizeof(jlong) >= sizeof(p), "too small");; |
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_value.set_type(T_LONG); _value.set_jlong((jlong)p); |
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#else |
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assert(sizeof(jint) >= sizeof(p), "too small");; |
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_value.set_type(T_INT); _value.set_jint((jint)p); |
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#endif |
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} |
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LIR_Const(Metadata* m) { |
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_value.set_type(T_METADATA); |
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#ifdef _LP64 |
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_value.set_jlong((jlong)m); |
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#else |
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_value.set_jint((jint)m); |
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#endif // _LP64 |
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} |
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virtual BasicType type() const { return _value.get_type(); } |
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virtual LIR_Const* as_constant() { return this; } |
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jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } |
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jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } |
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jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } |
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jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } |
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jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } |
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jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } |
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jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } |
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#ifdef _LP64 |
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address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } |
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Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); } |
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#else |
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address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } |
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Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); } |
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#endif |
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jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } |
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jint as_jint_lo_bits() const { |
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if (type() == T_DOUBLE) { |
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return low(jlong_cast(_value.get_jdouble())); |
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} else { |
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return as_jint_lo(); |
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} |
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} |
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jint as_jint_hi_bits() const { |
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if (type() == T_DOUBLE) { |
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return high(jlong_cast(_value.get_jdouble())); |
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} else { |
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return as_jint_hi(); |
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} |
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} |
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jlong as_jlong_bits() const { |
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if (type() == T_DOUBLE) { |
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return jlong_cast(_value.get_jdouble()); |
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} else { |
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return as_jlong(); |
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} |
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} |
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virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; |
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bool is_zero_float() { |
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jfloat f = as_jfloat(); |
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jfloat ok = 0.0f; |
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return jint_cast(f) == jint_cast(ok); |
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} |
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bool is_one_float() { |
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jfloat f = as_jfloat(); |
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return !g_isnan(f) && g_isfinite(f) && f == 1.0; |
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} |
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bool is_zero_double() { |
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jdouble d = as_jdouble(); |
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jdouble ok = 0.0; |
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return jlong_cast(d) == jlong_cast(ok); |
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} |
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bool is_one_double() { |
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jdouble d = as_jdouble(); |
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return !g_isnan(d) && g_isfinite(d) && d == 1.0; |
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} |
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}; |
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//---------------------LIR Operand descriptor------------------------------------ |
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// |
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// The class LIR_OprDesc represents a LIR instruction operand; |
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// it can be a register (ALU/FPU), stack location or a constant; |
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// Constants and addresses are represented as resource area allocated |
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// structures (see above). |
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// Registers and stack locations are inlined into the this pointer |
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// (see value function). |
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class LIR_OprDesc: public CompilationResourceObj { |
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public: |
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// value structure: |
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// data opr-type opr-kind |
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// +--------------+-------+-------+ |
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// [max...........|7 6 5 4|3 2 1 0] |
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// ^ |
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// is_pointer bit |
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// |
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// lowest bit cleared, means it is a structure pointer |
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// we need 4 bits to represent types |
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private: |
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friend class LIR_OprFact; |
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// Conversion |
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intptr_t value() const { return (intptr_t) this; } |
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bool check_value_mask(intptr_t mask, intptr_t masked_value) const { |
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return (value() & mask) == masked_value; |
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} |
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||
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enum OprKind { |
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pointer_value = 0 |
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, stack_value = 1 |
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, cpu_register = 3 |
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, fpu_register = 5 |
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, illegal_value = 7 |
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}; |
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enum OprBits { |
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pointer_bits = 1 |
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, kind_bits = 3 |
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, type_bits = 4 |
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, size_bits = 2 |
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, destroys_bits = 1 |
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, virtual_bits = 1 |
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, is_xmm_bits = 1 |
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, last_use_bits = 1 |
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, is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation |
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, non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + |
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is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits |
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, data_bits = BitsPerInt - non_data_bits |
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, reg_bits = data_bits / 2 // for two registers in one value encoding |
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}; |
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enum OprShift { |
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kind_shift = 0 |
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, type_shift = kind_shift + kind_bits |
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, size_shift = type_shift + type_bits |
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, destroys_shift = size_shift + size_bits |
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, last_use_shift = destroys_shift + destroys_bits |
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, is_fpu_stack_offset_shift = last_use_shift + last_use_bits |
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, virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits |
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, is_xmm_shift = virtual_shift + virtual_bits |
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, data_shift = is_xmm_shift + is_xmm_bits |
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, reg1_shift = data_shift |
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, reg2_shift = data_shift + reg_bits |
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}; |
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enum OprSize { |
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single_size = 0 << size_shift |
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, double_size = 1 << size_shift |
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}; |
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||
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enum OprMask { |
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kind_mask = right_n_bits(kind_bits) |
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, type_mask = right_n_bits(type_bits) << type_shift |
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, size_mask = right_n_bits(size_bits) << size_shift |
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, last_use_mask = right_n_bits(last_use_bits) << last_use_shift |
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, is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift |
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, virtual_mask = right_n_bits(virtual_bits) << virtual_shift |
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, is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift |
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, pointer_mask = right_n_bits(pointer_bits) |
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, lower_reg_mask = right_n_bits(reg_bits) |
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, no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) |
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}; |
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277 |
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uintptr_t data() const { return value() >> data_shift; } |
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int lo_reg_half() const { return data() & lower_reg_mask; } |
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int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } |
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OprKind kind_field() const { return (OprKind)(value() & kind_mask); } |
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OprSize size_field() const { return (OprSize)(value() & size_mask); } |
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283 |
||
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static char type_char(BasicType t); |
|
285 |
||
286 |
public: |
|
287 |
enum { |
|
288 |
vreg_base = ConcreteRegisterImpl::number_of_registers, |
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vreg_max = (1 << data_bits) - 1 |
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290 |
}; |
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291 |
||
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static inline LIR_Opr illegalOpr(); |
|
293 |
||
294 |
enum OprType { |
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unknown_type = 0 << type_shift // means: not set (catch uninitialized types) |
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296 |
, int_type = 1 << type_shift |
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, long_type = 2 << type_shift |
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, object_type = 3 << type_shift |
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, address_type = 4 << type_shift |
1 | 300 |
, float_type = 5 << type_shift |
301 |
, double_type = 6 << type_shift |
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, metadata_type = 7 << type_shift |
1 | 303 |
}; |
304 |
friend OprType as_OprType(BasicType t); |
|
305 |
friend BasicType as_BasicType(OprType t); |
|
306 |
||
307 |
OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } |
|
308 |
OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } |
|
309 |
||
310 |
static OprSize size_for(BasicType t) { |
|
311 |
switch (t) { |
|
312 |
case T_LONG: |
|
313 |
case T_DOUBLE: |
|
314 |
return double_size; |
|
315 |
break; |
|
316 |
||
317 |
case T_FLOAT: |
|
318 |
case T_BOOLEAN: |
|
319 |
case T_CHAR: |
|
320 |
case T_BYTE: |
|
321 |
case T_SHORT: |
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322 |
case T_INT: |
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case T_ADDRESS: |
1 | 324 |
case T_OBJECT: |
325 |
case T_ARRAY: |
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case T_METADATA: |
1 | 327 |
return single_size; |
328 |
break; |
|
329 |
||
330 |
default: |
|
331 |
ShouldNotReachHere(); |
|
1066 | 332 |
return single_size; |
1 | 333 |
} |
334 |
} |
|
335 |
||
336 |
||
337 |
void validate_type() const PRODUCT_RETURN; |
|
338 |
||
339 |
BasicType type() const { |
|
340 |
if (is_pointer()) { |
|
341 |
return pointer()->type(); |
|
342 |
} |
|
343 |
return as_BasicType(type_field()); |
|
344 |
} |
|
345 |
||
346 |
||
347 |
ValueType* value_type() const { return as_ValueType(type()); } |
|
348 |
||
349 |
char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } |
|
350 |
||
351 |
bool is_equal(LIR_Opr opr) const { return this == opr; } |
|
352 |
// checks whether types are same |
|
353 |
bool is_same_type(LIR_Opr opr) const { |
|
354 |
assert(type_field() != unknown_type && |
|
355 |
opr->type_field() != unknown_type, "shouldn't see unknown_type"); |
|
356 |
return type_field() == opr->type_field(); |
|
357 |
} |
|
358 |
bool is_same_register(LIR_Opr opr) { |
|
359 |
return (is_register() && opr->is_register() && |
|
360 |
kind_field() == opr->kind_field() && |
|
361 |
(value() & no_type_mask) == (opr->value() & no_type_mask)); |
|
362 |
} |
|
363 |
||
364 |
bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } |
|
365 |
bool is_illegal() const { return kind_field() == illegal_value; } |
|
366 |
bool is_valid() const { return kind_field() != illegal_value; } |
|
367 |
||
368 |
bool is_register() const { return is_cpu_register() || is_fpu_register(); } |
|
369 |
bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } |
|
370 |
||
371 |
bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } |
|
372 |
bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } |
|
373 |
||
374 |
bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } |
|
375 |
bool is_oop() const; |
|
376 |
||
377 |
// semantic for fpu- and xmm-registers: |
|
378 |
// * is_float and is_double return true for xmm_registers |
|
379 |
// (so is_single_fpu and is_single_xmm are true) |
|
380 |
// * So you must always check for is_???_xmm prior to is_???_fpu to |
|
381 |
// distinguish between fpu- and xmm-registers |
|
382 |
||
383 |
bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } |
|
384 |
bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } |
|
385 |
bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } |
|
386 |
||
387 |
bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } |
|
388 |
bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } |
|
389 |
bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } |
|
390 |
bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } |
|
391 |
bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } |
|
392 |
||
393 |
bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } |
|
394 |
bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } |
|
395 |
bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } |
|
396 |
bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } |
|
397 |
bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } |
|
398 |
||
399 |
bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } |
|
400 |
bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } |
|
401 |
bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } |
|
402 |
||
403 |
// fast accessor functions for special bits that do not work for pointers |
|
404 |
// (in this functions, the check for is_pointer() is omitted) |
|
405 |
bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } |
|
406 |
bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } |
|
407 |
bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } |
|
408 |
bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } |
|
409 |
BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } |
|
410 |
||
411 |
bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } |
|
412 |
bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } |
|
413 |
LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } |
|
414 |
LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } |
|
415 |
||
416 |
||
417 |
int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } |
|
418 |
int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } |
|
419 |
RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } |
|
420 |
RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } |
|
421 |
RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } |
|
422 |
RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } |
|
423 |
RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } |
|
424 |
RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } |
|
425 |
RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } |
|
426 |
RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } |
|
427 |
RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } |
|
428 |
int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } |
|
429 |
||
430 |
LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } |
|
431 |
LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } |
|
432 |
LIR_Address* as_address_ptr() const { return pointer()->as_address(); } |
|
433 |
||
434 |
Register as_register() const; |
|
435 |
Register as_register_lo() const; |
|
436 |
Register as_register_hi() const; |
|
437 |
||
438 |
Register as_pointer_register() { |
|
439 |
#ifdef _LP64 |
|
440 |
if (is_double_cpu()) { |
|
441 |
assert(as_register_lo() == as_register_hi(), "should be a single register"); |
|
442 |
return as_register_lo(); |
|
443 |
} |
|
444 |
#endif |
|
445 |
return as_register(); |
|
446 |
} |
|
447 |
||
1066 | 448 |
#ifdef X86 |
1 | 449 |
XMMRegister as_xmm_float_reg() const; |
450 |
XMMRegister as_xmm_double_reg() const; |
|
451 |
// for compatibility with RInfo |
|
452 |
int fpu () const { return lo_reg_half(); } |
|
1066 | 453 |
#endif // X86 |
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|
454 |
#if defined(SPARC) || defined(ARM) || defined(PPC) |
1 | 455 |
FloatRegister as_float_reg () const; |
456 |
FloatRegister as_double_reg () const; |
|
457 |
#endif |
|
458 |
||
459 |
jint as_jint() const { return as_constant_ptr()->as_jint(); } |
|
460 |
jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } |
|
461 |
jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } |
|
462 |
jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } |
|
463 |
jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } |
|
464 |
||
465 |
void print() const PRODUCT_RETURN; |
|
466 |
void print(outputStream* out) const PRODUCT_RETURN; |
|
467 |
}; |
|
468 |
||
469 |
||
470 |
inline LIR_OprDesc::OprType as_OprType(BasicType type) { |
|
471 |
switch (type) { |
|
472 |
case T_INT: return LIR_OprDesc::int_type; |
|
473 |
case T_LONG: return LIR_OprDesc::long_type; |
|
474 |
case T_FLOAT: return LIR_OprDesc::float_type; |
|
475 |
case T_DOUBLE: return LIR_OprDesc::double_type; |
|
476 |
case T_OBJECT: |
|
477 |
case T_ARRAY: return LIR_OprDesc::object_type; |
|
6742
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|
478 |
case T_ADDRESS: return LIR_OprDesc::address_type; |
13742
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|
479 |
case T_METADATA: return LIR_OprDesc::metadata_type; |
1 | 480 |
case T_ILLEGAL: // fall through |
481 |
default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; |
|
482 |
} |
|
483 |
} |
|
484 |
||
485 |
inline BasicType as_BasicType(LIR_OprDesc::OprType t) { |
|
486 |
switch (t) { |
|
487 |
case LIR_OprDesc::int_type: return T_INT; |
|
488 |
case LIR_OprDesc::long_type: return T_LONG; |
|
489 |
case LIR_OprDesc::float_type: return T_FLOAT; |
|
490 |
case LIR_OprDesc::double_type: return T_DOUBLE; |
|
491 |
case LIR_OprDesc::object_type: return T_OBJECT; |
|
6742
81ef369b8fc7
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6461
diff
changeset
|
492 |
case LIR_OprDesc::address_type: return T_ADDRESS; |
13742
9180987e305d
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diff
changeset
|
493 |
case LIR_OprDesc::metadata_type:return T_METADATA; |
1 | 494 |
case LIR_OprDesc::unknown_type: // fall through |
495 |
default: ShouldNotReachHere(); return T_ILLEGAL; |
|
496 |
} |
|
497 |
} |
|
498 |
||
499 |
||
500 |
// LIR_Address |
|
501 |
class LIR_Address: public LIR_OprPtr { |
|
502 |
friend class LIR_OpVisitState; |
|
503 |
||
504 |
public: |
|
505 |
// NOTE: currently these must be the log2 of the scale factor (and |
|
506 |
// must also be equivalent to the ScaleFactor enum in |
|
507 |
// assembler_i486.hpp) |
|
508 |
enum Scale { |
|
509 |
times_1 = 0, |
|
510 |
times_2 = 1, |
|
511 |
times_4 = 2, |
|
512 |
times_8 = 3 |
|
513 |
}; |
|
514 |
||
515 |
private: |
|
516 |
LIR_Opr _base; |
|
517 |
LIR_Opr _index; |
|
518 |
Scale _scale; |
|
519 |
intx _disp; |
|
520 |
BasicType _type; |
|
521 |
||
522 |
public: |
|
523 |
LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): |
|
524 |
_base(base) |
|
525 |
, _index(index) |
|
526 |
, _scale(times_1) |
|
527 |
, _type(type) |
|
528 |
, _disp(0) { verify(); } |
|
529 |
||
5695 | 530 |
LIR_Address(LIR_Opr base, intx disp, BasicType type): |
1 | 531 |
_base(base) |
532 |
, _index(LIR_OprDesc::illegalOpr()) |
|
533 |
, _scale(times_1) |
|
534 |
, _type(type) |
|
535 |
, _disp(disp) { verify(); } |
|
536 |
||
5695 | 537 |
LIR_Address(LIR_Opr base, BasicType type): |
538 |
_base(base) |
|
539 |
, _index(LIR_OprDesc::illegalOpr()) |
|
540 |
, _scale(times_1) |
|
541 |
, _type(type) |
|
542 |
, _disp(0) { verify(); } |
|
543 |
||
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
544 |
#if defined(X86) || defined(ARM) |
5695 | 545 |
LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): |
1 | 546 |
_base(base) |
547 |
, _index(index) |
|
548 |
, _scale(scale) |
|
549 |
, _type(type) |
|
550 |
, _disp(disp) { verify(); } |
|
6176
4d9030fe341f
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parents:
5702
diff
changeset
|
551 |
#endif // X86 || ARM |
1 | 552 |
|
553 |
LIR_Opr base() const { return _base; } |
|
554 |
LIR_Opr index() const { return _index; } |
|
555 |
Scale scale() const { return _scale; } |
|
556 |
intx disp() const { return _disp; } |
|
557 |
||
558 |
bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } |
|
559 |
||
560 |
virtual LIR_Address* as_address() { return this; } |
|
561 |
virtual BasicType type() const { return _type; } |
|
562 |
virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; |
|
563 |
||
564 |
void verify() const PRODUCT_RETURN; |
|
565 |
||
566 |
static Scale scale(BasicType type); |
|
567 |
}; |
|
568 |
||
569 |
||
570 |
// operand factory |
|
571 |
class LIR_OprFact: public AllStatic { |
|
572 |
public: |
|
573 |
||
574 |
static LIR_Opr illegalOpr; |
|
575 |
||
6742
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
576 |
static LIR_Opr single_cpu(int reg) { |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
577 |
return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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changeset
|
578 |
LIR_OprDesc::int_type | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
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diff
changeset
|
579 |
LIR_OprDesc::cpu_register | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
580 |
LIR_OprDesc::single_size); |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
581 |
} |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
582 |
static LIR_Opr single_cpu_oop(int reg) { |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
583 |
return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
584 |
LIR_OprDesc::object_type | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
585 |
LIR_OprDesc::cpu_register | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
586 |
LIR_OprDesc::single_size); |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
587 |
} |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
588 |
static LIR_Opr single_cpu_address(int reg) { |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
589 |
return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
590 |
LIR_OprDesc::address_type | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
591 |
LIR_OprDesc::cpu_register | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
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parents:
6461
diff
changeset
|
592 |
LIR_OprDesc::single_size); |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
593 |
} |
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
594 |
static LIR_Opr single_cpu_metadata(int reg) { |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
595 |
return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
596 |
LIR_OprDesc::metadata_type | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
597 |
LIR_OprDesc::cpu_register | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
598 |
LIR_OprDesc::single_size); |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
599 |
} |
1066 | 600 |
static LIR_Opr double_cpu(int reg1, int reg2) { |
601 |
LP64_ONLY(assert(reg1 == reg2, "must be identical")); |
|
602 |
return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | |
|
603 |
(reg2 << LIR_OprDesc::reg2_shift) | |
|
604 |
LIR_OprDesc::long_type | |
|
605 |
LIR_OprDesc::cpu_register | |
|
606 |
LIR_OprDesc::double_size); |
|
607 |
} |
|
1 | 608 |
|
1066 | 609 |
static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
610 |
LIR_OprDesc::float_type | |
|
611 |
LIR_OprDesc::fpu_register | |
|
612 |
LIR_OprDesc::single_size); } |
|
6176
4d9030fe341f
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bobv
parents:
5702
diff
changeset
|
613 |
#if defined(ARM) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
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5702
diff
changeset
|
614 |
static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
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|
615 |
static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } |
4d9030fe341f
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|
616 |
static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } |
4d9030fe341f
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|
617 |
#endif |
1 | 618 |
#ifdef SPARC |
1066 | 619 |
static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | |
620 |
(reg2 << LIR_OprDesc::reg2_shift) | |
|
621 |
LIR_OprDesc::double_type | |
|
622 |
LIR_OprDesc::fpu_register | |
|
623 |
LIR_OprDesc::double_size); } |
|
1 | 624 |
#endif |
1066 | 625 |
#ifdef X86 |
626 |
static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
|
627 |
(reg << LIR_OprDesc::reg2_shift) | |
|
628 |
LIR_OprDesc::double_type | |
|
629 |
LIR_OprDesc::fpu_register | |
|
630 |
LIR_OprDesc::double_size); } |
|
631 |
||
632 |
static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
|
633 |
LIR_OprDesc::float_type | |
|
634 |
LIR_OprDesc::fpu_register | |
|
635 |
LIR_OprDesc::single_size | |
|
636 |
LIR_OprDesc::is_xmm_mask); } |
|
637 |
static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
|
638 |
(reg << LIR_OprDesc::reg2_shift) | |
|
639 |
LIR_OprDesc::double_type | |
|
640 |
LIR_OprDesc::fpu_register | |
|
641 |
LIR_OprDesc::double_size | |
|
642 |
LIR_OprDesc::is_xmm_mask); } |
|
643 |
#endif // X86 |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
644 |
#ifdef PPC |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
645 |
static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
646 |
(reg << LIR_OprDesc::reg2_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
647 |
LIR_OprDesc::double_type | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
648 |
LIR_OprDesc::fpu_register | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
649 |
LIR_OprDesc::double_size); } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
650 |
static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
651 |
LIR_OprDesc::float_type | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
652 |
LIR_OprDesc::cpu_register | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
653 |
LIR_OprDesc::single_size); } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
654 |
static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
655 |
(reg1 << LIR_OprDesc::reg2_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
656 |
LIR_OprDesc::double_type | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
657 |
LIR_OprDesc::cpu_register | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
658 |
LIR_OprDesc::double_size); } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
659 |
#endif // PPC |
1 | 660 |
|
661 |
static LIR_Opr virtual_register(int index, BasicType type) { |
|
662 |
LIR_Opr res; |
|
663 |
switch (type) { |
|
664 |
case T_OBJECT: // fall through |
|
1066 | 665 |
case T_ARRAY: |
666 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
667 |
LIR_OprDesc::object_type | |
|
668 |
LIR_OprDesc::cpu_register | |
|
669 |
LIR_OprDesc::single_size | |
|
670 |
LIR_OprDesc::virtual_mask); |
|
671 |
break; |
|
672 |
||
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
673 |
case T_METADATA: |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
674 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
675 |
LIR_OprDesc::metadata_type| |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
676 |
LIR_OprDesc::cpu_register | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
677 |
LIR_OprDesc::single_size | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
678 |
LIR_OprDesc::virtual_mask); |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
679 |
break; |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
680 |
|
1066 | 681 |
case T_INT: |
682 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
683 |
LIR_OprDesc::int_type | |
|
684 |
LIR_OprDesc::cpu_register | |
|
685 |
LIR_OprDesc::single_size | |
|
686 |
LIR_OprDesc::virtual_mask); |
|
687 |
break; |
|
688 |
||
6742
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
689 |
case T_ADDRESS: |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
690 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
691 |
LIR_OprDesc::address_type | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
692 |
LIR_OprDesc::cpu_register | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
693 |
LIR_OprDesc::single_size | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
694 |
LIR_OprDesc::virtual_mask); |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
695 |
break; |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
696 |
|
1066 | 697 |
case T_LONG: |
698 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
699 |
LIR_OprDesc::long_type | |
|
700 |
LIR_OprDesc::cpu_register | |
|
701 |
LIR_OprDesc::double_size | |
|
702 |
LIR_OprDesc::virtual_mask); |
|
703 |
break; |
|
704 |
||
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
705 |
#ifdef __SOFTFP__ |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
706 |
case T_FLOAT: |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
707 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
708 |
LIR_OprDesc::float_type | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
709 |
LIR_OprDesc::cpu_register | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
710 |
LIR_OprDesc::single_size | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
711 |
LIR_OprDesc::virtual_mask); |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
712 |
break; |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
713 |
case T_DOUBLE: |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
714 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
715 |
LIR_OprDesc::double_type | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
716 |
LIR_OprDesc::cpu_register | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
717 |
LIR_OprDesc::double_size | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
718 |
LIR_OprDesc::virtual_mask); |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
719 |
break; |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
720 |
#else // __SOFTFP__ |
1066 | 721 |
case T_FLOAT: |
722 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
723 |
LIR_OprDesc::float_type | |
|
724 |
LIR_OprDesc::fpu_register | |
|
725 |
LIR_OprDesc::single_size | |
|
726 |
LIR_OprDesc::virtual_mask); |
|
727 |
break; |
|
728 |
||
729 |
case |
|
730 |
T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
731 |
LIR_OprDesc::double_type | |
|
732 |
LIR_OprDesc::fpu_register | |
|
733 |
LIR_OprDesc::double_size | |
|
734 |
LIR_OprDesc::virtual_mask); |
|
735 |
break; |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
736 |
#endif // __SOFTFP__ |
1 | 737 |
default: ShouldNotReachHere(); res = illegalOpr; |
738 |
} |
|
739 |
||
740 |
#ifdef ASSERT |
|
741 |
res->validate_type(); |
|
742 |
assert(res->vreg_number() == index, "conversion check"); |
|
743 |
assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); |
|
744 |
assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); |
|
745 |
||
746 |
// old-style calculation; check if old and new method are equal |
|
747 |
LIR_OprDesc::OprType t = as_OprType(type); |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
748 |
#ifdef __SOFTFP__ |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
749 |
LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
750 |
t | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
751 |
LIR_OprDesc::cpu_register | |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
752 |
LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
753 |
#else // __SOFTFP__ |
1066 | 754 |
LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | |
755 |
((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | |
|
1 | 756 |
LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
757 |
assert(res == old_res, "old and new method not equal"); |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
758 |
#endif // __SOFTFP__ |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
759 |
#endif // ASSERT |
1 | 760 |
|
761 |
return res; |
|
762 |
} |
|
763 |
||
764 |
// 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as |
|
765 |
// the index is platform independent; a double stack useing indeces 2 and 3 has always |
|
766 |
// index 2. |
|
767 |
static LIR_Opr stack(int index, BasicType type) { |
|
768 |
LIR_Opr res; |
|
769 |
switch (type) { |
|
770 |
case T_OBJECT: // fall through |
|
1066 | 771 |
case T_ARRAY: |
772 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
773 |
LIR_OprDesc::object_type | |
|
774 |
LIR_OprDesc::stack_value | |
|
775 |
LIR_OprDesc::single_size); |
|
776 |
break; |
|
777 |
||
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
778 |
case T_METADATA: |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
779 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
780 |
LIR_OprDesc::metadata_type | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
781 |
LIR_OprDesc::stack_value | |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
782 |
LIR_OprDesc::single_size); |
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
783 |
break; |
1066 | 784 |
case T_INT: |
785 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
786 |
LIR_OprDesc::int_type | |
|
787 |
LIR_OprDesc::stack_value | |
|
788 |
LIR_OprDesc::single_size); |
|
789 |
break; |
|
790 |
||
6742
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
791 |
case T_ADDRESS: |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
792 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
793 |
LIR_OprDesc::address_type | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
794 |
LIR_OprDesc::stack_value | |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
795 |
LIR_OprDesc::single_size); |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
796 |
break; |
81ef369b8fc7
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
6461
diff
changeset
|
797 |
|
1066 | 798 |
case T_LONG: |
799 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
800 |
LIR_OprDesc::long_type | |
|
801 |
LIR_OprDesc::stack_value | |
|
802 |
LIR_OprDesc::double_size); |
|
803 |
break; |
|
804 |
||
805 |
case T_FLOAT: |
|
806 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
807 |
LIR_OprDesc::float_type | |
|
808 |
LIR_OprDesc::stack_value | |
|
809 |
LIR_OprDesc::single_size); |
|
810 |
break; |
|
811 |
case T_DOUBLE: |
|
812 |
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
|
813 |
LIR_OprDesc::double_type | |
|
814 |
LIR_OprDesc::stack_value | |
|
815 |
LIR_OprDesc::double_size); |
|
816 |
break; |
|
1 | 817 |
|
818 |
default: ShouldNotReachHere(); res = illegalOpr; |
|
819 |
} |
|
820 |
||
821 |
#ifdef ASSERT |
|
822 |
assert(index >= 0, "index must be positive"); |
|
823 |
assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); |
|
824 |
||
1066 | 825 |
LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
826 |
LIR_OprDesc::stack_value | |
|
827 |
as_OprType(type) | |
|
828 |
LIR_OprDesc::size_for(type)); |
|
1 | 829 |
assert(res == old_res, "old and new method not equal"); |
830 |
#endif |
|
831 |
||
832 |
return res; |
|
833 |
} |
|
834 |
||
835 |
static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } |
|
836 |
static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } |
|
837 |
static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } |
|
838 |
static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } |
|
839 |
static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } |
|
840 |
static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } |
|
841 |
static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } |
|
842 |
static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } |
|
843 |
static LIR_Opr illegal() { return (LIR_Opr)-1; } |
|
5048
c31b6243f37e
6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents:
5046
diff
changeset
|
844 |
static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } |
13728
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
13391
diff
changeset
|
845 |
static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); } |
1 | 846 |
|
847 |
static LIR_Opr value_type(ValueType* type); |
|
848 |
static LIR_Opr dummy_value_type(ValueType* type); |
|
849 |
}; |
|
850 |
||
851 |
||
852 |
//------------------------------------------------------------------------------- |
|
853 |
// LIR Instructions |
|
854 |
//------------------------------------------------------------------------------- |
|
855 |
// |
|
856 |
// Note: |
|
857 |
// - every instruction has a result operand |
|
858 |
// - every instruction has an CodeEmitInfo operand (can be revisited later) |
|
859 |
// - every instruction has a LIR_OpCode operand |
|
860 |
// - LIR_OpN, means an instruction that has N input operands |
|
861 |
// |
|
862 |
// class hierarchy: |
|
863 |
// |
|
864 |
class LIR_Op; |
|
865 |
class LIR_Op0; |
|
866 |
class LIR_OpLabel; |
|
867 |
class LIR_Op1; |
|
868 |
class LIR_OpBranch; |
|
869 |
class LIR_OpConvert; |
|
870 |
class LIR_OpAllocObj; |
|
871 |
class LIR_OpRoundFP; |
|
872 |
class LIR_Op2; |
|
873 |
class LIR_OpDelay; |
|
874 |
class LIR_Op3; |
|
875 |
class LIR_OpAllocArray; |
|
876 |
class LIR_OpCall; |
|
877 |
class LIR_OpJavaCall; |
|
878 |
class LIR_OpRTCall; |
|
879 |
class LIR_OpArrayCopy; |
|
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
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parents:
17011
diff
changeset
|
880 |
class LIR_OpUpdateCRC32; |
1 | 881 |
class LIR_OpLock; |
882 |
class LIR_OpTypeCheck; |
|
883 |
class LIR_OpCompareAndSwap; |
|
884 |
class LIR_OpProfileCall; |
|
20702
bbe0fcde6e13
8023657: New type profiling points: arguments to call
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parents:
19710
diff
changeset
|
885 |
class LIR_OpProfileType; |
17011
def8879c5b81
8011648: C1: optimized build is broken after 7153771
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parents:
16611
diff
changeset
|
886 |
#ifdef ASSERT |
16611 | 887 |
class LIR_OpAssert; |
17011
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8011648: C1: optimized build is broken after 7153771
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parents:
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diff
changeset
|
888 |
#endif |
1 | 889 |
|
890 |
// LIR operation codes |
|
891 |
enum LIR_Code { |
|
892 |
lir_none |
|
893 |
, begin_op0 |
|
894 |
, lir_word_align |
|
895 |
, lir_label |
|
896 |
, lir_nop |
|
897 |
, lir_backwardbranch_target |
|
898 |
, lir_std_entry |
|
899 |
, lir_osr_entry |
|
900 |
, lir_build_frame |
|
901 |
, lir_fpop_raw |
|
902 |
, lir_24bit_FPU |
|
903 |
, lir_reset_FPU |
|
904 |
, lir_breakpoint |
|
905 |
, lir_rtcall |
|
906 |
, lir_membar |
|
907 |
, lir_membar_acquire |
|
908 |
, lir_membar_release |
|
11886
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
909 |
, lir_membar_loadload |
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
910 |
, lir_membar_storestore |
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
911 |
, lir_membar_loadstore |
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
912 |
, lir_membar_storeload |
1 | 913 |
, lir_get_thread |
914 |
, end_op0 |
|
915 |
, begin_op1 |
|
916 |
, lir_fxch |
|
917 |
, lir_fld |
|
918 |
, lir_ffree |
|
919 |
, lir_push |
|
920 |
, lir_pop |
|
921 |
, lir_null_check |
|
922 |
, lir_return |
|
923 |
, lir_leal |
|
924 |
, lir_neg |
|
925 |
, lir_branch |
|
926 |
, lir_cond_float_branch |
|
927 |
, lir_move |
|
928 |
, lir_prefetchr |
|
929 |
, lir_prefetchw |
|
930 |
, lir_convert |
|
931 |
, lir_alloc_object |
|
932 |
, lir_monaddr |
|
933 |
, lir_roundfp |
|
934 |
, lir_safepoint |
|
6453 | 935 |
, lir_pack64 |
936 |
, lir_unpack64 |
|
5334
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6939930: exception unwind changes in 6919934 hurts compilation speed
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parents:
5048
diff
changeset
|
937 |
, lir_unwind |
1 | 938 |
, end_op1 |
939 |
, begin_op2 |
|
940 |
, lir_cmp |
|
941 |
, lir_cmp_l2i |
|
942 |
, lir_ucmp_fd2i |
|
943 |
, lir_cmp_fd2i |
|
944 |
, lir_cmove |
|
945 |
, lir_add |
|
946 |
, lir_sub |
|
947 |
, lir_mul |
|
948 |
, lir_mul_strictfp |
|
949 |
, lir_div |
|
950 |
, lir_div_strictfp |
|
951 |
, lir_rem |
|
952 |
, lir_sqrt |
|
953 |
, lir_abs |
|
954 |
, lir_sin |
|
955 |
, lir_cos |
|
956 |
, lir_tan |
|
957 |
, lir_log |
|
958 |
, lir_log10 |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
959 |
, lir_exp |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
960 |
, lir_pow |
1 | 961 |
, lir_logic_and |
962 |
, lir_logic_or |
|
963 |
, lir_logic_xor |
|
964 |
, lir_shl |
|
965 |
, lir_shr |
|
966 |
, lir_ushr |
|
967 |
, lir_alloc_array |
|
968 |
, lir_throw |
|
969 |
, lir_compare_to |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
970 |
, lir_xadd |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
971 |
, lir_xchg |
1 | 972 |
, end_op2 |
973 |
, begin_op3 |
|
974 |
, lir_idiv |
|
975 |
, lir_irem |
|
976 |
, end_op3 |
|
977 |
, begin_opJavaCall |
|
978 |
, lir_static_call |
|
979 |
, lir_optvirtual_call |
|
980 |
, lir_icvirtual_call |
|
981 |
, lir_virtual_call |
|
5046 | 982 |
, lir_dynamic_call |
1 | 983 |
, end_opJavaCall |
984 |
, begin_opArrayCopy |
|
985 |
, lir_arraycopy |
|
986 |
, end_opArrayCopy |
|
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
987 |
, begin_opUpdateCRC32 |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
988 |
, lir_updatecrc32 |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
989 |
, end_opUpdateCRC32 |
1 | 990 |
, begin_opLock |
991 |
, lir_lock |
|
992 |
, lir_unlock |
|
993 |
, end_opLock |
|
994 |
, begin_delay_slot |
|
995 |
, lir_delay_slot |
|
996 |
, end_delay_slot |
|
997 |
, begin_opTypeCheck |
|
998 |
, lir_instanceof |
|
999 |
, lir_checkcast |
|
1000 |
, lir_store_check |
|
1001 |
, end_opTypeCheck |
|
1002 |
, begin_opCompareAndSwap |
|
1003 |
, lir_cas_long |
|
1004 |
, lir_cas_obj |
|
1005 |
, lir_cas_int |
|
1006 |
, end_opCompareAndSwap |
|
1007 |
, begin_opMDOProfile |
|
1008 |
, lir_profile_call |
|
20702
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1009 |
, lir_profile_type |
1 | 1010 |
, end_opMDOProfile |
16611 | 1011 |
, begin_opAssert |
1012 |
, lir_assert |
|
1013 |
, end_opAssert |
|
1 | 1014 |
}; |
1015 |
||
1016 |
||
1017 |
enum LIR_Condition { |
|
1018 |
lir_cond_equal |
|
1019 |
, lir_cond_notEqual |
|
1020 |
, lir_cond_less |
|
1021 |
, lir_cond_lessEqual |
|
1022 |
, lir_cond_greaterEqual |
|
1023 |
, lir_cond_greater |
|
1024 |
, lir_cond_belowEqual |
|
1025 |
, lir_cond_aboveEqual |
|
1026 |
, lir_cond_always |
|
1027 |
, lir_cond_unknown = -1 |
|
1028 |
}; |
|
1029 |
||
1030 |
||
1031 |
enum LIR_PatchCode { |
|
1032 |
lir_patch_none, |
|
1033 |
lir_patch_low, |
|
1034 |
lir_patch_high, |
|
1035 |
lir_patch_normal |
|
1036 |
}; |
|
1037 |
||
1038 |
||
1039 |
enum LIR_MoveKind { |
|
1040 |
lir_move_normal, |
|
1041 |
lir_move_volatile, |
|
1042 |
lir_move_unaligned, |
|
7427 | 1043 |
lir_move_wide, |
1 | 1044 |
lir_move_max_flag |
1045 |
}; |
|
1046 |
||
1047 |
||
1048 |
// -------------------------------------------------- |
|
1049 |
// LIR_Op |
|
1050 |
// -------------------------------------------------- |
|
1051 |
class LIR_Op: public CompilationResourceObj { |
|
1052 |
friend class LIR_OpVisitState; |
|
1053 |
||
1054 |
#ifdef ASSERT |
|
1055 |
private: |
|
1056 |
const char * _file; |
|
1057 |
int _line; |
|
1058 |
#endif |
|
1059 |
||
1060 |
protected: |
|
1061 |
LIR_Opr _result; |
|
1062 |
unsigned short _code; |
|
1063 |
unsigned short _flags; |
|
1064 |
CodeEmitInfo* _info; |
|
1065 |
int _id; // value id for register allocation |
|
1066 |
int _fpu_pop_count; |
|
1067 |
Instruction* _source; // for debugging |
|
1068 |
||
1069 |
static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; |
|
1070 |
||
1071 |
protected: |
|
1072 |
static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } |
|
1073 |
||
1074 |
public: |
|
1075 |
LIR_Op() |
|
1076 |
: _result(LIR_OprFact::illegalOpr) |
|
1077 |
, _code(lir_none) |
|
1078 |
, _flags(0) |
|
1079 |
, _info(NULL) |
|
1080 |
#ifdef ASSERT |
|
1081 |
, _file(NULL) |
|
1082 |
, _line(0) |
|
1083 |
#endif |
|
1084 |
, _fpu_pop_count(0) |
|
1085 |
, _source(NULL) |
|
1086 |
, _id(-1) {} |
|
1087 |
||
1088 |
LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) |
|
1089 |
: _result(result) |
|
1090 |
, _code(code) |
|
1091 |
, _flags(0) |
|
1092 |
, _info(info) |
|
1093 |
#ifdef ASSERT |
|
1094 |
, _file(NULL) |
|
1095 |
, _line(0) |
|
1096 |
#endif |
|
1097 |
, _fpu_pop_count(0) |
|
1098 |
, _source(NULL) |
|
1099 |
, _id(-1) {} |
|
1100 |
||
1101 |
CodeEmitInfo* info() const { return _info; } |
|
1102 |
LIR_Code code() const { return (LIR_Code)_code; } |
|
1103 |
LIR_Opr result_opr() const { return _result; } |
|
1104 |
void set_result_opr(LIR_Opr opr) { _result = opr; } |
|
1105 |
||
1106 |
#ifdef ASSERT |
|
1107 |
void set_file_and_line(const char * file, int line) { |
|
1108 |
_file = file; |
|
1109 |
_line = line; |
|
1110 |
} |
|
1111 |
#endif |
|
1112 |
||
1113 |
virtual const char * name() const PRODUCT_RETURN0; |
|
1114 |
||
1115 |
int id() const { return _id; } |
|
1116 |
void set_id(int id) { _id = id; } |
|
1117 |
||
1118 |
// FPU stack simulation helpers -- only used on Intel |
|
1119 |
void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } |
|
1120 |
int fpu_pop_count() const { return _fpu_pop_count; } |
|
1121 |
bool pop_fpu_stack() { return _fpu_pop_count > 0; } |
|
1122 |
||
1123 |
Instruction* source() const { return _source; } |
|
1124 |
void set_source(Instruction* ins) { _source = ins; } |
|
1125 |
||
1126 |
virtual void emit_code(LIR_Assembler* masm) = 0; |
|
1127 |
virtual void print_instr(outputStream* out) const = 0; |
|
1128 |
virtual void print_on(outputStream* st) const PRODUCT_RETURN; |
|
1129 |
||
24669 | 1130 |
virtual bool is_patching() { return false; } |
1 | 1131 |
virtual LIR_OpCall* as_OpCall() { return NULL; } |
1132 |
virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } |
|
1133 |
virtual LIR_OpLabel* as_OpLabel() { return NULL; } |
|
1134 |
virtual LIR_OpDelay* as_OpDelay() { return NULL; } |
|
1135 |
virtual LIR_OpLock* as_OpLock() { return NULL; } |
|
1136 |
virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } |
|
1137 |
virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } |
|
1138 |
virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } |
|
1139 |
virtual LIR_OpBranch* as_OpBranch() { return NULL; } |
|
1140 |
virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } |
|
1141 |
virtual LIR_OpConvert* as_OpConvert() { return NULL; } |
|
1142 |
virtual LIR_Op0* as_Op0() { return NULL; } |
|
1143 |
virtual LIR_Op1* as_Op1() { return NULL; } |
|
1144 |
virtual LIR_Op2* as_Op2() { return NULL; } |
|
1145 |
virtual LIR_Op3* as_Op3() { return NULL; } |
|
1146 |
virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } |
|
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1147 |
virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } |
1 | 1148 |
virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } |
1149 |
virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } |
|
1150 |
virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } |
|
20702
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1151 |
virtual LIR_OpProfileType* as_OpProfileType() { return NULL; } |
17011
def8879c5b81
8011648: C1: optimized build is broken after 7153771
roland
parents:
16611
diff
changeset
|
1152 |
#ifdef ASSERT |
16611 | 1153 |
virtual LIR_OpAssert* as_OpAssert() { return NULL; } |
17011
def8879c5b81
8011648: C1: optimized build is broken after 7153771
roland
parents:
16611
diff
changeset
|
1154 |
#endif |
1 | 1155 |
|
1156 |
virtual void verify() const {} |
|
1157 |
}; |
|
1158 |
||
1159 |
// for calls |
|
1160 |
class LIR_OpCall: public LIR_Op { |
|
1161 |
friend class LIR_OpVisitState; |
|
1162 |
||
1163 |
protected: |
|
1164 |
address _addr; |
|
1165 |
LIR_OprList* _arguments; |
|
1166 |
protected: |
|
1167 |
LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, |
|
1168 |
LIR_OprList* arguments, CodeEmitInfo* info = NULL) |
|
1169 |
: LIR_Op(code, result, info) |
|
1170 |
, _arguments(arguments) |
|
1171 |
, _addr(addr) {} |
|
1172 |
||
1173 |
public: |
|
1174 |
address addr() const { return _addr; } |
|
1175 |
const LIR_OprList* arguments() const { return _arguments; } |
|
1176 |
virtual LIR_OpCall* as_OpCall() { return this; } |
|
1177 |
}; |
|
1178 |
||
1179 |
||
1180 |
// -------------------------------------------------- |
|
1181 |
// LIR_OpJavaCall |
|
1182 |
// -------------------------------------------------- |
|
1183 |
class LIR_OpJavaCall: public LIR_OpCall { |
|
1184 |
friend class LIR_OpVisitState; |
|
1185 |
||
1186 |
private: |
|
5687 | 1187 |
ciMethod* _method; |
1188 |
LIR_Opr _receiver; |
|
1189 |
LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. |
|
1 | 1190 |
|
1191 |
public: |
|
1192 |
LIR_OpJavaCall(LIR_Code code, ciMethod* method, |
|
1193 |
LIR_Opr receiver, LIR_Opr result, |
|
1194 |
address addr, LIR_OprList* arguments, |
|
1195 |
CodeEmitInfo* info) |
|
1196 |
: LIR_OpCall(code, addr, result, arguments, info) |
|
1197 |
, _receiver(receiver) |
|
5687 | 1198 |
, _method(method) |
1199 |
, _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) |
|
1200 |
{ assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } |
|
1 | 1201 |
|
1202 |
LIR_OpJavaCall(LIR_Code code, ciMethod* method, |
|
1203 |
LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, |
|
1204 |
LIR_OprList* arguments, CodeEmitInfo* info) |
|
1205 |
: LIR_OpCall(code, (address)vtable_offset, result, arguments, info) |
|
1206 |
, _receiver(receiver) |
|
5687 | 1207 |
, _method(method) |
1208 |
, _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) |
|
1209 |
{ assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } |
|
1 | 1210 |
|
1211 |
LIR_Opr receiver() const { return _receiver; } |
|
1212 |
ciMethod* method() const { return _method; } |
|
1213 |
||
5046 | 1214 |
// JSR 292 support. |
1215 |
bool is_invokedynamic() const { return code() == lir_dynamic_call; } |
|
1216 |
bool is_method_handle_invoke() const { |
|
1217 |
return |
|
13391
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1218 |
method()->is_compiled_lambda_form() // Java-generated adapter |
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1219 |
|| |
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1220 |
method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic |
5046 | 1221 |
} |
1222 |
||
1 | 1223 |
intptr_t vtable_offset() const { |
1224 |
assert(_code == lir_virtual_call, "only have vtable for real vcall"); |
|
1225 |
return (intptr_t) addr(); |
|
1226 |
} |
|
1227 |
||
1228 |
virtual void emit_code(LIR_Assembler* masm); |
|
1229 |
virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } |
|
1230 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1231 |
}; |
|
1232 |
||
1233 |
// -------------------------------------------------- |
|
1234 |
// LIR_OpLabel |
|
1235 |
// -------------------------------------------------- |
|
1236 |
// Location where a branch can continue |
|
1237 |
class LIR_OpLabel: public LIR_Op { |
|
1238 |
friend class LIR_OpVisitState; |
|
1239 |
||
1240 |
private: |
|
1241 |
Label* _label; |
|
1242 |
public: |
|
1243 |
LIR_OpLabel(Label* lbl) |
|
1244 |
: LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) |
|
1245 |
, _label(lbl) {} |
|
1246 |
Label* label() const { return _label; } |
|
1247 |
||
1248 |
virtual void emit_code(LIR_Assembler* masm); |
|
1249 |
virtual LIR_OpLabel* as_OpLabel() { return this; } |
|
1250 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1251 |
}; |
|
1252 |
||
1253 |
// LIR_OpArrayCopy |
|
1254 |
class LIR_OpArrayCopy: public LIR_Op { |
|
1255 |
friend class LIR_OpVisitState; |
|
1256 |
||
1257 |
private: |
|
1258 |
ArrayCopyStub* _stub; |
|
1259 |
LIR_Opr _src; |
|
1260 |
LIR_Opr _src_pos; |
|
1261 |
LIR_Opr _dst; |
|
1262 |
LIR_Opr _dst_pos; |
|
1263 |
LIR_Opr _length; |
|
1264 |
LIR_Opr _tmp; |
|
1265 |
ciArrayKlass* _expected_type; |
|
1266 |
int _flags; |
|
1267 |
||
1268 |
public: |
|
1269 |
enum Flags { |
|
1270 |
src_null_check = 1 << 0, |
|
1271 |
dst_null_check = 1 << 1, |
|
1272 |
src_pos_positive_check = 1 << 2, |
|
1273 |
dst_pos_positive_check = 1 << 3, |
|
1274 |
length_positive_check = 1 << 4, |
|
1275 |
src_range_check = 1 << 5, |
|
1276 |
dst_range_check = 1 << 6, |
|
1277 |
type_check = 1 << 7, |
|
9102 | 1278 |
overlapping = 1 << 8, |
1279 |
unaligned = 1 << 9, |
|
1280 |
src_objarray = 1 << 10, |
|
1281 |
dst_objarray = 1 << 11, |
|
1282 |
all_flags = (1 << 12) - 1 |
|
1 | 1283 |
}; |
1284 |
||
1285 |
LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, |
|
1286 |
ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); |
|
1287 |
||
1288 |
LIR_Opr src() const { return _src; } |
|
1289 |
LIR_Opr src_pos() const { return _src_pos; } |
|
1290 |
LIR_Opr dst() const { return _dst; } |
|
1291 |
LIR_Opr dst_pos() const { return _dst_pos; } |
|
1292 |
LIR_Opr length() const { return _length; } |
|
1293 |
LIR_Opr tmp() const { return _tmp; } |
|
1294 |
int flags() const { return _flags; } |
|
1295 |
ciArrayKlass* expected_type() const { return _expected_type; } |
|
1296 |
ArrayCopyStub* stub() const { return _stub; } |
|
1297 |
||
1298 |
virtual void emit_code(LIR_Assembler* masm); |
|
1299 |
virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } |
|
1300 |
void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1301 |
}; |
|
1302 |
||
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1303 |
// LIR_OpUpdateCRC32 |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
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diff
changeset
|
1304 |
class LIR_OpUpdateCRC32: public LIR_Op { |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1305 |
friend class LIR_OpVisitState; |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
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diff
changeset
|
1306 |
|
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1307 |
private: |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1308 |
LIR_Opr _crc; |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1309 |
LIR_Opr _val; |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1310 |
|
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1311 |
public: |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1312 |
|
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1313 |
LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res); |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1314 |
|
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1315 |
LIR_Opr crc() const { return _crc; } |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1316 |
LIR_Opr val() const { return _val; } |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1317 |
|
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1318 |
virtual void emit_code(LIR_Assembler* masm); |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1319 |
virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; } |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1320 |
void print_instr(outputStream* out) const PRODUCT_RETURN; |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
1321 |
}; |
1 | 1322 |
|
1323 |
// -------------------------------------------------- |
|
1324 |
// LIR_Op0 |
|
1325 |
// -------------------------------------------------- |
|
1326 |
class LIR_Op0: public LIR_Op { |
|
1327 |
friend class LIR_OpVisitState; |
|
1328 |
||
1329 |
public: |
|
1330 |
LIR_Op0(LIR_Code code) |
|
1331 |
: LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } |
|
1332 |
LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) |
|
1333 |
: LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } |
|
1334 |
||
1335 |
virtual void emit_code(LIR_Assembler* masm); |
|
1336 |
virtual LIR_Op0* as_Op0() { return this; } |
|
1337 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1338 |
}; |
|
1339 |
||
1340 |
||
1341 |
// -------------------------------------------------- |
|
1342 |
// LIR_Op1 |
|
1343 |
// -------------------------------------------------- |
|
1344 |
||
1345 |
class LIR_Op1: public LIR_Op { |
|
1346 |
friend class LIR_OpVisitState; |
|
1347 |
||
1348 |
protected: |
|
1349 |
LIR_Opr _opr; // input operand |
|
1350 |
BasicType _type; // Operand types |
|
1351 |
LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) |
|
1352 |
||
1353 |
static void print_patch_code(outputStream* out, LIR_PatchCode code); |
|
1354 |
||
1355 |
void set_kind(LIR_MoveKind kind) { |
|
1356 |
assert(code() == lir_move, "must be"); |
|
1357 |
_flags = kind; |
|
1358 |
} |
|
1359 |
||
1360 |
public: |
|
1361 |
LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) |
|
1362 |
: LIR_Op(code, result, info) |
|
1363 |
, _opr(opr) |
|
1364 |
, _patch(patch) |
|
1365 |
, _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } |
|
1366 |
||
1367 |
LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) |
|
1368 |
: LIR_Op(code, result, info) |
|
1369 |
, _opr(opr) |
|
1370 |
, _patch(patch) |
|
1371 |
, _type(type) { |
|
1372 |
assert(code == lir_move, "must be"); |
|
1373 |
set_kind(kind); |
|
1374 |
} |
|
1375 |
||
1376 |
LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) |
|
1377 |
: LIR_Op(code, LIR_OprFact::illegalOpr, info) |
|
1378 |
, _opr(opr) |
|
1379 |
, _patch(lir_patch_none) |
|
1380 |
, _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } |
|
1381 |
||
1382 |
LIR_Opr in_opr() const { return _opr; } |
|
1383 |
LIR_PatchCode patch_code() const { return _patch; } |
|
1384 |
BasicType type() const { return _type; } |
|
1385 |
||
1386 |
LIR_MoveKind move_kind() const { |
|
1387 |
assert(code() == lir_move, "must be"); |
|
1388 |
return (LIR_MoveKind)_flags; |
|
1389 |
} |
|
1390 |
||
24669 | 1391 |
virtual bool is_patching() { return _patch != lir_patch_none; } |
1 | 1392 |
virtual void emit_code(LIR_Assembler* masm); |
1393 |
virtual LIR_Op1* as_Op1() { return this; } |
|
1394 |
virtual const char * name() const PRODUCT_RETURN0; |
|
1395 |
||
1396 |
void set_in_opr(LIR_Opr opr) { _opr = opr; } |
|
1397 |
||
1398 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1399 |
virtual void verify() const; |
|
1400 |
}; |
|
1401 |
||
1402 |
||
1403 |
// for runtime calls |
|
1404 |
class LIR_OpRTCall: public LIR_OpCall { |
|
1405 |
friend class LIR_OpVisitState; |
|
1406 |
||
1407 |
private: |
|
1408 |
LIR_Opr _tmp; |
|
1409 |
public: |
|
1410 |
LIR_OpRTCall(address addr, LIR_Opr tmp, |
|
1411 |
LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) |
|
1412 |
: LIR_OpCall(lir_rtcall, addr, result, arguments, info) |
|
1413 |
, _tmp(tmp) {} |
|
1414 |
||
1415 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1416 |
virtual void emit_code(LIR_Assembler* masm); |
|
1417 |
virtual LIR_OpRTCall* as_OpRTCall() { return this; } |
|
1418 |
||
1419 |
LIR_Opr tmp() const { return _tmp; } |
|
1420 |
||
1421 |
virtual void verify() const; |
|
1422 |
}; |
|
1423 |
||
1424 |
||
1425 |
class LIR_OpBranch: public LIR_Op { |
|
1426 |
friend class LIR_OpVisitState; |
|
1427 |
||
1428 |
private: |
|
1429 |
LIR_Condition _cond; |
|
1430 |
BasicType _type; |
|
1431 |
Label* _label; |
|
1432 |
BlockBegin* _block; // if this is a branch to a block, this is the block |
|
1433 |
BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block |
|
1434 |
CodeStub* _stub; // if this is a branch to a stub, this is the stub |
|
1435 |
||
1436 |
public: |
|
11563 | 1437 |
LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) |
1 | 1438 |
: LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) |
1439 |
, _cond(cond) |
|
11563 | 1440 |
, _type(type) |
1 | 1441 |
, _label(lbl) |
1442 |
, _block(NULL) |
|
1443 |
, _ublock(NULL) |
|
1444 |
, _stub(NULL) { } |
|
1445 |
||
1446 |
LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); |
|
1447 |
LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); |
|
1448 |
||
1449 |
// for unordered comparisons |
|
1450 |
LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); |
|
1451 |
||
1452 |
LIR_Condition cond() const { return _cond; } |
|
1453 |
BasicType type() const { return _type; } |
|
1454 |
Label* label() const { return _label; } |
|
1455 |
BlockBegin* block() const { return _block; } |
|
1456 |
BlockBegin* ublock() const { return _ublock; } |
|
1457 |
CodeStub* stub() const { return _stub; } |
|
1458 |
||
1459 |
void change_block(BlockBegin* b); |
|
1460 |
void change_ublock(BlockBegin* b); |
|
1461 |
void negate_cond(); |
|
1462 |
||
1463 |
virtual void emit_code(LIR_Assembler* masm); |
|
1464 |
virtual LIR_OpBranch* as_OpBranch() { return this; } |
|
1465 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1466 |
}; |
|
1467 |
||
1468 |
||
1469 |
class ConversionStub; |
|
1470 |
||
1471 |
class LIR_OpConvert: public LIR_Op1 { |
|
1472 |
friend class LIR_OpVisitState; |
|
1473 |
||
1474 |
private: |
|
1475 |
Bytecodes::Code _bytecode; |
|
1476 |
ConversionStub* _stub; |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1477 |
#ifdef PPC |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1478 |
LIR_Opr _tmp1; |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1479 |
LIR_Opr _tmp2; |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1480 |
#endif |
1 | 1481 |
|
1482 |
public: |
|
1483 |
LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) |
|
1484 |
: LIR_Op1(lir_convert, opr, result) |
|
1485 |
, _stub(stub) |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1486 |
#ifdef PPC |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1487 |
, _tmp1(LIR_OprDesc::illegalOpr()) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1488 |
, _tmp2(LIR_OprDesc::illegalOpr()) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1489 |
#endif |
1 | 1490 |
, _bytecode(code) {} |
1491 |
||
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1492 |
#ifdef PPC |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1493 |
LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1494 |
,LIR_Opr tmp1, LIR_Opr tmp2) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1495 |
: LIR_Op1(lir_convert, opr, result) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1496 |
, _stub(stub) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1497 |
, _tmp1(tmp1) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1498 |
, _tmp2(tmp2) |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1499 |
, _bytecode(code) {} |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1500 |
#endif |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1501 |
|
1 | 1502 |
Bytecodes::Code bytecode() const { return _bytecode; } |
1503 |
ConversionStub* stub() const { return _stub; } |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1504 |
#ifdef PPC |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1505 |
LIR_Opr tmp1() const { return _tmp1; } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1506 |
LIR_Opr tmp2() const { return _tmp2; } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1507 |
#endif |
1 | 1508 |
|
1509 |
virtual void emit_code(LIR_Assembler* masm); |
|
1510 |
virtual LIR_OpConvert* as_OpConvert() { return this; } |
|
1511 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1512 |
||
1513 |
static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; |
|
1514 |
}; |
|
1515 |
||
1516 |
||
1517 |
// LIR_OpAllocObj |
|
1518 |
class LIR_OpAllocObj : public LIR_Op1 { |
|
1519 |
friend class LIR_OpVisitState; |
|
1520 |
||
1521 |
private: |
|
1522 |
LIR_Opr _tmp1; |
|
1523 |
LIR_Opr _tmp2; |
|
1524 |
LIR_Opr _tmp3; |
|
1525 |
LIR_Opr _tmp4; |
|
1526 |
int _hdr_size; |
|
1527 |
int _obj_size; |
|
1528 |
CodeStub* _stub; |
|
1529 |
bool _init_check; |
|
1530 |
||
1531 |
public: |
|
1532 |
LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, |
|
1533 |
LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, |
|
1534 |
int hdr_size, int obj_size, bool init_check, CodeStub* stub) |
|
1535 |
: LIR_Op1(lir_alloc_object, klass, result) |
|
1536 |
, _tmp1(t1) |
|
1537 |
, _tmp2(t2) |
|
1538 |
, _tmp3(t3) |
|
1539 |
, _tmp4(t4) |
|
1540 |
, _hdr_size(hdr_size) |
|
1541 |
, _obj_size(obj_size) |
|
1542 |
, _init_check(init_check) |
|
1543 |
, _stub(stub) { } |
|
1544 |
||
1545 |
LIR_Opr klass() const { return in_opr(); } |
|
1546 |
LIR_Opr obj() const { return result_opr(); } |
|
1547 |
LIR_Opr tmp1() const { return _tmp1; } |
|
1548 |
LIR_Opr tmp2() const { return _tmp2; } |
|
1549 |
LIR_Opr tmp3() const { return _tmp3; } |
|
1550 |
LIR_Opr tmp4() const { return _tmp4; } |
|
1551 |
int header_size() const { return _hdr_size; } |
|
1552 |
int object_size() const { return _obj_size; } |
|
1553 |
bool init_check() const { return _init_check; } |
|
1554 |
CodeStub* stub() const { return _stub; } |
|
1555 |
||
1556 |
virtual void emit_code(LIR_Assembler* masm); |
|
1557 |
virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } |
|
1558 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1559 |
}; |
|
1560 |
||
1561 |
||
1562 |
// LIR_OpRoundFP |
|
1563 |
class LIR_OpRoundFP : public LIR_Op1 { |
|
1564 |
friend class LIR_OpVisitState; |
|
1565 |
||
1566 |
private: |
|
1567 |
LIR_Opr _tmp; |
|
1568 |
||
1569 |
public: |
|
1570 |
LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) |
|
1571 |
: LIR_Op1(lir_roundfp, reg, result) |
|
1572 |
, _tmp(stack_loc_temp) {} |
|
1573 |
||
1574 |
LIR_Opr tmp() const { return _tmp; } |
|
1575 |
virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } |
|
1576 |
void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1577 |
}; |
|
1578 |
||
1579 |
// LIR_OpTypeCheck |
|
1580 |
class LIR_OpTypeCheck: public LIR_Op { |
|
1581 |
friend class LIR_OpVisitState; |
|
1582 |
||
1583 |
private: |
|
1584 |
LIR_Opr _object; |
|
1585 |
LIR_Opr _array; |
|
1586 |
ciKlass* _klass; |
|
1587 |
LIR_Opr _tmp1; |
|
1588 |
LIR_Opr _tmp2; |
|
1589 |
LIR_Opr _tmp3; |
|
1590 |
bool _fast_check; |
|
1591 |
CodeEmitInfo* _info_for_patch; |
|
1592 |
CodeEmitInfo* _info_for_exception; |
|
1593 |
CodeStub* _stub; |
|
1594 |
ciMethod* _profiled_method; |
|
1595 |
int _profiled_bci; |
|
6453 | 1596 |
bool _should_profile; |
1 | 1597 |
|
1598 |
public: |
|
1599 |
LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, |
|
1600 |
LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, |
|
6453 | 1601 |
CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); |
1 | 1602 |
LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, |
6453 | 1603 |
LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
1 | 1604 |
|
1605 |
LIR_Opr object() const { return _object; } |
|
1606 |
LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } |
|
1607 |
LIR_Opr tmp1() const { return _tmp1; } |
|
1608 |
LIR_Opr tmp2() const { return _tmp2; } |
|
1609 |
LIR_Opr tmp3() const { return _tmp3; } |
|
1610 |
ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } |
|
1611 |
bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } |
|
1612 |
CodeEmitInfo* info_for_patch() const { return _info_for_patch; } |
|
1613 |
CodeEmitInfo* info_for_exception() const { return _info_for_exception; } |
|
1614 |
CodeStub* stub() const { return _stub; } |
|
1615 |
||
13728
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
13391
diff
changeset
|
1616 |
// MethodData* profiling |
6453 | 1617 |
void set_profiled_method(ciMethod *method) { _profiled_method = method; } |
1618 |
void set_profiled_bci(int bci) { _profiled_bci = bci; } |
|
1619 |
void set_should_profile(bool b) { _should_profile = b; } |
|
1620 |
ciMethod* profiled_method() const { return _profiled_method; } |
|
1621 |
int profiled_bci() const { return _profiled_bci; } |
|
1622 |
bool should_profile() const { return _should_profile; } |
|
1 | 1623 |
|
24669 | 1624 |
virtual bool is_patching() { return _info_for_patch != NULL; } |
1 | 1625 |
virtual void emit_code(LIR_Assembler* masm); |
1626 |
virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } |
|
1627 |
void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1628 |
}; |
|
1629 |
||
1630 |
// LIR_Op2 |
|
1631 |
class LIR_Op2: public LIR_Op { |
|
1632 |
friend class LIR_OpVisitState; |
|
1633 |
||
1634 |
int _fpu_stack_size; // for sin/cos implementation on Intel |
|
1635 |
||
1636 |
protected: |
|
1637 |
LIR_Opr _opr1; |
|
1638 |
LIR_Opr _opr2; |
|
1639 |
BasicType _type; |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1640 |
LIR_Opr _tmp1; |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1641 |
LIR_Opr _tmp2; |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1642 |
LIR_Opr _tmp3; |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1643 |
LIR_Opr _tmp4; |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1644 |
LIR_Opr _tmp5; |
1 | 1645 |
LIR_Condition _condition; |
1646 |
||
1647 |
void verify() const; |
|
1648 |
||
1649 |
public: |
|
1650 |
LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) |
|
1651 |
: LIR_Op(code, LIR_OprFact::illegalOpr, info) |
|
1652 |
, _opr1(opr1) |
|
1653 |
, _opr2(opr2) |
|
1654 |
, _type(T_ILLEGAL) |
|
1655 |
, _condition(condition) |
|
1656 |
, _fpu_stack_size(0) |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1657 |
, _tmp1(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1658 |
, _tmp2(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1659 |
, _tmp3(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1660 |
, _tmp4(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1661 |
, _tmp5(LIR_OprFact::illegalOpr) { |
16611 | 1662 |
assert(code == lir_cmp || code == lir_assert, "code check"); |
1 | 1663 |
} |
1664 |
||
7713
1e06d2419258
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
7427
diff
changeset
|
1665 |
LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) |
1 | 1666 |
: LIR_Op(code, result, NULL) |
1667 |
, _opr1(opr1) |
|
1668 |
, _opr2(opr2) |
|
7713
1e06d2419258
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
7427
diff
changeset
|
1669 |
, _type(type) |
1 | 1670 |
, _condition(condition) |
1671 |
, _fpu_stack_size(0) |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1672 |
, _tmp1(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1673 |
, _tmp2(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1674 |
, _tmp3(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1675 |
, _tmp4(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1676 |
, _tmp5(LIR_OprFact::illegalOpr) { |
1 | 1677 |
assert(code == lir_cmove, "code check"); |
7713
1e06d2419258
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
7427
diff
changeset
|
1678 |
assert(type != T_ILLEGAL, "cmove should have type"); |
1 | 1679 |
} |
1680 |
||
1681 |
LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, |
|
1682 |
CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) |
|
1683 |
: LIR_Op(code, result, info) |
|
1684 |
, _opr1(opr1) |
|
1685 |
, _opr2(opr2) |
|
1686 |
, _type(type) |
|
1687 |
, _condition(lir_cond_unknown) |
|
1688 |
, _fpu_stack_size(0) |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1689 |
, _tmp1(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1690 |
, _tmp2(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1691 |
, _tmp3(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1692 |
, _tmp4(LIR_OprFact::illegalOpr) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1693 |
, _tmp5(LIR_OprFact::illegalOpr) { |
1 | 1694 |
assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); |
1695 |
} |
|
1696 |
||
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1697 |
LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1698 |
LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) |
1 | 1699 |
: LIR_Op(code, result, NULL) |
1700 |
, _opr1(opr1) |
|
1701 |
, _opr2(opr2) |
|
1702 |
, _type(T_ILLEGAL) |
|
1703 |
, _condition(lir_cond_unknown) |
|
1704 |
, _fpu_stack_size(0) |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1705 |
, _tmp1(tmp1) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1706 |
, _tmp2(tmp2) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1707 |
, _tmp3(tmp3) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1708 |
, _tmp4(tmp4) |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1709 |
, _tmp5(tmp5) { |
1 | 1710 |
assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); |
1711 |
} |
|
1712 |
||
1713 |
LIR_Opr in_opr1() const { return _opr1; } |
|
1714 |
LIR_Opr in_opr2() const { return _opr2; } |
|
1715 |
BasicType type() const { return _type; } |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1716 |
LIR_Opr tmp1_opr() const { return _tmp1; } |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1717 |
LIR_Opr tmp2_opr() const { return _tmp2; } |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1718 |
LIR_Opr tmp3_opr() const { return _tmp3; } |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1719 |
LIR_Opr tmp4_opr() const { return _tmp4; } |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
1720 |
LIR_Opr tmp5_opr() const { return _tmp5; } |
1 | 1721 |
LIR_Condition condition() const { |
16611 | 1722 |
assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; |
1 | 1723 |
} |
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1724 |
void set_condition(LIR_Condition condition) { |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1725 |
assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1726 |
} |
1 | 1727 |
|
1728 |
void set_fpu_stack_size(int size) { _fpu_stack_size = size; } |
|
1729 |
int fpu_stack_size() const { return _fpu_stack_size; } |
|
1730 |
||
1731 |
void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } |
|
1732 |
void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } |
|
1733 |
||
1734 |
virtual void emit_code(LIR_Assembler* masm); |
|
1735 |
virtual LIR_Op2* as_Op2() { return this; } |
|
1736 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1737 |
}; |
|
1738 |
||
1739 |
class LIR_OpAllocArray : public LIR_Op { |
|
1740 |
friend class LIR_OpVisitState; |
|
1741 |
||
1742 |
private: |
|
1743 |
LIR_Opr _klass; |
|
1744 |
LIR_Opr _len; |
|
1745 |
LIR_Opr _tmp1; |
|
1746 |
LIR_Opr _tmp2; |
|
1747 |
LIR_Opr _tmp3; |
|
1748 |
LIR_Opr _tmp4; |
|
1749 |
BasicType _type; |
|
1750 |
CodeStub* _stub; |
|
1751 |
||
1752 |
public: |
|
1753 |
LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) |
|
1754 |
: LIR_Op(lir_alloc_array, result, NULL) |
|
1755 |
, _klass(klass) |
|
1756 |
, _len(len) |
|
1757 |
, _tmp1(t1) |
|
1758 |
, _tmp2(t2) |
|
1759 |
, _tmp3(t3) |
|
1760 |
, _tmp4(t4) |
|
1761 |
, _type(type) |
|
1762 |
, _stub(stub) {} |
|
1763 |
||
1764 |
LIR_Opr klass() const { return _klass; } |
|
1765 |
LIR_Opr len() const { return _len; } |
|
1766 |
LIR_Opr obj() const { return result_opr(); } |
|
1767 |
LIR_Opr tmp1() const { return _tmp1; } |
|
1768 |
LIR_Opr tmp2() const { return _tmp2; } |
|
1769 |
LIR_Opr tmp3() const { return _tmp3; } |
|
1770 |
LIR_Opr tmp4() const { return _tmp4; } |
|
1771 |
BasicType type() const { return _type; } |
|
1772 |
CodeStub* stub() const { return _stub; } |
|
1773 |
||
1774 |
virtual void emit_code(LIR_Assembler* masm); |
|
1775 |
virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } |
|
1776 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1777 |
}; |
|
1778 |
||
1779 |
||
1780 |
class LIR_Op3: public LIR_Op { |
|
1781 |
friend class LIR_OpVisitState; |
|
1782 |
||
1783 |
private: |
|
1784 |
LIR_Opr _opr1; |
|
1785 |
LIR_Opr _opr2; |
|
1786 |
LIR_Opr _opr3; |
|
1787 |
public: |
|
1788 |
LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) |
|
1789 |
: LIR_Op(code, result, info) |
|
1790 |
, _opr1(opr1) |
|
1791 |
, _opr2(opr2) |
|
1792 |
, _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } |
|
1793 |
LIR_Opr in_opr1() const { return _opr1; } |
|
1794 |
LIR_Opr in_opr2() const { return _opr2; } |
|
1795 |
LIR_Opr in_opr3() const { return _opr3; } |
|
1796 |
||
1797 |
virtual void emit_code(LIR_Assembler* masm); |
|
1798 |
virtual LIR_Op3* as_Op3() { return this; } |
|
1799 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1800 |
}; |
|
1801 |
||
1802 |
||
1803 |
//-------------------------------- |
|
1804 |
class LabelObj: public CompilationResourceObj { |
|
1805 |
private: |
|
1806 |
Label _label; |
|
1807 |
public: |
|
1808 |
LabelObj() {} |
|
1809 |
Label* label() { return &_label; } |
|
1810 |
}; |
|
1811 |
||
1812 |
||
1813 |
class LIR_OpLock: public LIR_Op { |
|
1814 |
friend class LIR_OpVisitState; |
|
1815 |
||
1816 |
private: |
|
1817 |
LIR_Opr _hdr; |
|
1818 |
LIR_Opr _obj; |
|
1819 |
LIR_Opr _lock; |
|
1820 |
LIR_Opr _scratch; |
|
1821 |
CodeStub* _stub; |
|
1822 |
public: |
|
1823 |
LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) |
|
1824 |
: LIR_Op(code, LIR_OprFact::illegalOpr, info) |
|
1825 |
, _hdr(hdr) |
|
1826 |
, _obj(obj) |
|
1827 |
, _lock(lock) |
|
1828 |
, _scratch(scratch) |
|
1829 |
, _stub(stub) {} |
|
1830 |
||
1831 |
LIR_Opr hdr_opr() const { return _hdr; } |
|
1832 |
LIR_Opr obj_opr() const { return _obj; } |
|
1833 |
LIR_Opr lock_opr() const { return _lock; } |
|
1834 |
LIR_Opr scratch_opr() const { return _scratch; } |
|
1835 |
CodeStub* stub() const { return _stub; } |
|
1836 |
||
1837 |
virtual void emit_code(LIR_Assembler* masm); |
|
1838 |
virtual LIR_OpLock* as_OpLock() { return this; } |
|
1839 |
void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1840 |
}; |
|
1841 |
||
1842 |
||
1843 |
class LIR_OpDelay: public LIR_Op { |
|
1844 |
friend class LIR_OpVisitState; |
|
1845 |
||
1846 |
private: |
|
1847 |
LIR_Op* _op; |
|
1848 |
||
1849 |
public: |
|
1850 |
LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): |
|
1851 |
LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), |
|
1852 |
_op(op) { |
|
1853 |
assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); |
|
1854 |
} |
|
1855 |
virtual void emit_code(LIR_Assembler* masm); |
|
1856 |
virtual LIR_OpDelay* as_OpDelay() { return this; } |
|
1857 |
void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1858 |
LIR_Op* delay_op() const { return _op; } |
|
1859 |
CodeEmitInfo* call_info() const { return info(); } |
|
1860 |
}; |
|
1861 |
||
16611 | 1862 |
#ifdef ASSERT |
1863 |
// LIR_OpAssert |
|
1864 |
class LIR_OpAssert : public LIR_Op2 { |
|
1865 |
friend class LIR_OpVisitState; |
|
1866 |
||
1867 |
private: |
|
1868 |
const char* _msg; |
|
1869 |
bool _halt; |
|
1870 |
||
1871 |
public: |
|
1872 |
LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) |
|
1873 |
: LIR_Op2(lir_assert, condition, opr1, opr2) |
|
1874 |
, _halt(halt) |
|
1875 |
, _msg(msg) { |
|
1876 |
} |
|
1877 |
||
1878 |
const char* msg() const { return _msg; } |
|
1879 |
bool halt() const { return _halt; } |
|
1880 |
||
1881 |
virtual void emit_code(LIR_Assembler* masm); |
|
1882 |
virtual LIR_OpAssert* as_OpAssert() { return this; } |
|
1883 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1884 |
}; |
|
1885 |
#endif |
|
1 | 1886 |
|
1887 |
// LIR_OpCompareAndSwap |
|
1888 |
class LIR_OpCompareAndSwap : public LIR_Op { |
|
1889 |
friend class LIR_OpVisitState; |
|
1890 |
||
1891 |
private: |
|
1892 |
LIR_Opr _addr; |
|
1893 |
LIR_Opr _cmp_value; |
|
1894 |
LIR_Opr _new_value; |
|
1895 |
LIR_Opr _tmp1; |
|
1896 |
LIR_Opr _tmp2; |
|
1897 |
||
1898 |
public: |
|
6176
4d9030fe341f
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parents:
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changeset
|
1899 |
LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
4d9030fe341f
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parents:
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diff
changeset
|
1900 |
LIR_Opr t1, LIR_Opr t2, LIR_Opr result) |
4d9030fe341f
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bobv
parents:
5702
diff
changeset
|
1901 |
: LIR_Op(code, result, NULL) // no result, no info |
1 | 1902 |
, _addr(addr) |
1903 |
, _cmp_value(cmp_value) |
|
1904 |
, _new_value(new_value) |
|
1905 |
, _tmp1(t1) |
|
1906 |
, _tmp2(t2) { } |
|
1907 |
||
1908 |
LIR_Opr addr() const { return _addr; } |
|
1909 |
LIR_Opr cmp_value() const { return _cmp_value; } |
|
1910 |
LIR_Opr new_value() const { return _new_value; } |
|
1911 |
LIR_Opr tmp1() const { return _tmp1; } |
|
1912 |
LIR_Opr tmp2() const { return _tmp2; } |
|
1913 |
||
1914 |
virtual void emit_code(LIR_Assembler* masm); |
|
1915 |
virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } |
|
1916 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1917 |
}; |
|
1918 |
||
1919 |
// LIR_OpProfileCall |
|
1920 |
class LIR_OpProfileCall : public LIR_Op { |
|
1921 |
friend class LIR_OpVisitState; |
|
1922 |
||
1923 |
private: |
|
1924 |
ciMethod* _profiled_method; |
|
13391
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7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
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diff
changeset
|
1925 |
int _profiled_bci; |
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
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diff
changeset
|
1926 |
ciMethod* _profiled_callee; |
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1927 |
LIR_Opr _mdo; |
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1928 |
LIR_Opr _recv; |
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1929 |
LIR_Opr _tmp1; |
30245956af37
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twisti
parents:
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diff
changeset
|
1930 |
ciKlass* _known_holder; |
1 | 1931 |
|
1932 |
public: |
|
1933 |
// Destroys recv |
|
20702
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parents:
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diff
changeset
|
1934 |
LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
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parents:
19710
diff
changeset
|
1935 |
: LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info |
1 | 1936 |
, _profiled_method(profiled_method) |
1937 |
, _profiled_bci(profiled_bci) |
|
13391
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1938 |
, _profiled_callee(profiled_callee) |
1 | 1939 |
, _mdo(mdo) |
1940 |
, _recv(recv) |
|
1941 |
, _tmp1(t1) |
|
1942 |
, _known_holder(known_holder) { } |
|
1943 |
||
1944 |
ciMethod* profiled_method() const { return _profiled_method; } |
|
1945 |
int profiled_bci() const { return _profiled_bci; } |
|
13391
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
1946 |
ciMethod* profiled_callee() const { return _profiled_callee; } |
1 | 1947 |
LIR_Opr mdo() const { return _mdo; } |
1948 |
LIR_Opr recv() const { return _recv; } |
|
1949 |
LIR_Opr tmp1() const { return _tmp1; } |
|
1950 |
ciKlass* known_holder() const { return _known_holder; } |
|
1951 |
||
1952 |
virtual void emit_code(LIR_Assembler* masm); |
|
1953 |
virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } |
|
1954 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
|
1955 |
}; |
|
1956 |
||
20702
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1957 |
// LIR_OpProfileType |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1958 |
class LIR_OpProfileType : public LIR_Op { |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1959 |
friend class LIR_OpVisitState; |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1960 |
|
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1961 |
private: |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1962 |
LIR_Opr _mdp; |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1963 |
LIR_Opr _obj; |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1964 |
LIR_Opr _tmp; |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1965 |
ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1966 |
intptr_t _current_klass; // what the profiling currently reports |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1967 |
bool _not_null; // true if we know statically that _obj cannot be null |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1968 |
bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1969 |
// _exact_klass it the only possible type for this parameter in any context. |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1970 |
|
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1971 |
public: |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1972 |
// Destroys recv |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1973 |
LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1974 |
: LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1975 |
, _mdp(mdp) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1976 |
, _obj(obj) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
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diff
changeset
|
1977 |
, _exact_klass(exact_klass) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1978 |
, _current_klass(current_klass) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1979 |
, _tmp(tmp) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1980 |
, _not_null(not_null) |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1981 |
, _no_conflict(no_conflict) { } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1982 |
|
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1983 |
LIR_Opr mdp() const { return _mdp; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1984 |
LIR_Opr obj() const { return _obj; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1985 |
LIR_Opr tmp() const { return _tmp; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1986 |
ciKlass* exact_klass() const { return _exact_klass; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1987 |
intptr_t current_klass() const { return _current_klass; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1988 |
bool not_null() const { return _not_null; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1989 |
bool no_conflict() const { return _no_conflict; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1990 |
|
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1991 |
virtual void emit_code(LIR_Assembler* masm); |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1992 |
virtual LIR_OpProfileType* as_OpProfileType() { return this; } |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1993 |
virtual void print_instr(outputStream* out) const PRODUCT_RETURN; |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1994 |
}; |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
1995 |
|
1 | 1996 |
class LIR_InsertionBuffer; |
1997 |
||
1998 |
//--------------------------------LIR_List--------------------------------------------------- |
|
1999 |
// Maintains a list of LIR instructions (one instance of LIR_List per basic block) |
|
2000 |
// The LIR instructions are appended by the LIR_List class itself; |
|
2001 |
// |
|
2002 |
// Notes: |
|
2003 |
// - all offsets are(should be) in bytes |
|
2004 |
// - local positions are specified with an offset, with offset 0 being local 0 |
|
2005 |
||
2006 |
class LIR_List: public CompilationResourceObj { |
|
2007 |
private: |
|
2008 |
LIR_OpList _operations; |
|
2009 |
||
2010 |
Compilation* _compilation; |
|
2011 |
#ifndef PRODUCT |
|
2012 |
BlockBegin* _block; |
|
2013 |
#endif |
|
2014 |
#ifdef ASSERT |
|
2015 |
const char * _file; |
|
2016 |
int _line; |
|
2017 |
#endif |
|
2018 |
||
2019 |
void append(LIR_Op* op) { |
|
2020 |
if (op->source() == NULL) |
|
2021 |
op->set_source(_compilation->current_instruction()); |
|
2022 |
#ifndef PRODUCT |
|
2023 |
if (PrintIRWithLIR) { |
|
2024 |
_compilation->maybe_print_current_instruction(); |
|
2025 |
op->print(); tty->cr(); |
|
2026 |
} |
|
2027 |
#endif // PRODUCT |
|
2028 |
||
2029 |
_operations.append(op); |
|
2030 |
||
2031 |
#ifdef ASSERT |
|
2032 |
op->verify(); |
|
2033 |
op->set_file_and_line(_file, _line); |
|
2034 |
_file = NULL; |
|
2035 |
_line = 0; |
|
2036 |
#endif |
|
2037 |
} |
|
2038 |
||
2039 |
public: |
|
2040 |
LIR_List(Compilation* compilation, BlockBegin* block = NULL); |
|
2041 |
||
2042 |
#ifdef ASSERT |
|
2043 |
void set_file_and_line(const char * file, int line); |
|
2044 |
#endif |
|
2045 |
||
2046 |
//---------- accessors --------------- |
|
2047 |
LIR_OpList* instructions_list() { return &_operations; } |
|
2048 |
int length() const { return _operations.length(); } |
|
2049 |
LIR_Op* at(int i) const { return _operations.at(i); } |
|
2050 |
||
2051 |
NOT_PRODUCT(BlockBegin* block() const { return _block; }); |
|
2052 |
||
2053 |
// insert LIR_Ops in buffer to right places in LIR_List |
|
2054 |
void append(LIR_InsertionBuffer* buffer); |
|
2055 |
||
2056 |
//---------- mutators --------------- |
|
2057 |
void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } |
|
2058 |
void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } |
|
6453 | 2059 |
void remove_at(int i) { _operations.remove_at(i); } |
1 | 2060 |
|
2061 |
//---------- printing ------------- |
|
2062 |
void print_instructions() PRODUCT_RETURN; |
|
2063 |
||
2064 |
||
2065 |
//---------- instructions ------------- |
|
2066 |
void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
|
2067 |
address dest, LIR_OprList* arguments, |
|
2068 |
CodeEmitInfo* info) { |
|
2069 |
append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); |
|
2070 |
} |
|
2071 |
void call_static(ciMethod* method, LIR_Opr result, |
|
2072 |
address dest, LIR_OprList* arguments, CodeEmitInfo* info) { |
|
2073 |
append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); |
|
2074 |
} |
|
2075 |
void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
|
2076 |
address dest, LIR_OprList* arguments, CodeEmitInfo* info) { |
|
2077 |
append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); |
|
2078 |
} |
|
2079 |
void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
|
2080 |
intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { |
|
2081 |
append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); |
|
2082 |
} |
|
5046 | 2083 |
void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
2084 |
address dest, LIR_OprList* arguments, CodeEmitInfo* info) { |
|
2085 |
append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); |
|
2086 |
} |
|
1 | 2087 |
|
2088 |
void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } |
|
2089 |
void word_align() { append(new LIR_Op0(lir_word_align)); } |
|
2090 |
void membar() { append(new LIR_Op0(lir_membar)); } |
|
2091 |
void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } |
|
2092 |
void membar_release() { append(new LIR_Op0(lir_membar_release)); } |
|
11886
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
2093 |
void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } |
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
2094 |
void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } |
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
2095 |
void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } |
feebf5c9f40c
7120481: storeStore barrier in constructor with final field
jiangli
parents:
11563
diff
changeset
|
2096 |
void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } |
1 | 2097 |
|
2098 |
void nop() { append(new LIR_Op0(lir_nop)); } |
|
2099 |
void build_frame() { append(new LIR_Op0(lir_build_frame)); } |
|
2100 |
||
2101 |
void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } |
|
2102 |
void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } |
|
2103 |
||
2104 |
void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } |
|
2105 |
||
2106 |
void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } |
|
2107 |
void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } |
|
2108 |
||
2109 |
// result is a stack location for old backend and vreg for UseLinearScan |
|
2110 |
// stack_loc_temp is an illegal register for old backend |
|
2111 |
void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } |
|
2112 |
void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } |
|
2113 |
void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } |
|
2114 |
void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } |
|
2115 |
void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } |
|
2116 |
void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } |
|
2117 |
void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } |
|
7427 | 2118 |
void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { |
2119 |
if (UseCompressedOops) { |
|
2120 |
append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); |
|
2121 |
} else { |
|
2122 |
move(src, dst, info); |
|
2123 |
} |
|
2124 |
} |
|
2125 |
void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { |
|
2126 |
if (UseCompressedOops) { |
|
2127 |
append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); |
|
2128 |
} else { |
|
2129 |
move(src, dst, info); |
|
2130 |
} |
|
2131 |
} |
|
1 | 2132 |
void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } |
2133 |
||
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
2134 |
void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } |
1 | 2135 |
void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); |
2136 |
||
13742
9180987e305d
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
13728
diff
changeset
|
2137 |
void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } |
13728
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
13391
diff
changeset
|
2138 |
void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); |
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
13391
diff
changeset
|
2139 |
|
1 | 2140 |
void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } |
2141 |
||
2142 |
void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } |
|
2143 |
||
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2144 |
#ifdef PPC |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2145 |
void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2146 |
#endif |
1 | 2147 |
void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } |
2148 |
||
2149 |
void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } |
|
2150 |
void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } |
|
2151 |
void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } |
|
2152 |
||
6453 | 2153 |
void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } |
2154 |
void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } |
|
2155 |
||
1 | 2156 |
void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } |
5334
b2d040a8d375
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
5048
diff
changeset
|
2157 |
void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { |
b2d040a8d375
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
5048
diff
changeset
|
2158 |
append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); |
b2d040a8d375
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
5048
diff
changeset
|
2159 |
} |
b2d040a8d375
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
5048
diff
changeset
|
2160 |
void unwind_exception(LIR_Opr exceptionOop) { |
b2d040a8d375
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
5048
diff
changeset
|
2161 |
append(new LIR_Op1(lir_unwind, exceptionOop)); |
b2d040a8d375
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
5048
diff
changeset
|
2162 |
} |
1 | 2163 |
|
2164 |
void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { |
|
2165 |
append(new LIR_Op2(lir_compare_to, left, right, dst)); |
|
2166 |
} |
|
2167 |
||
2168 |
void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } |
|
2169 |
void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } |
|
2170 |
||
2171 |
void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { |
|
2172 |
append(new LIR_Op2(lir_cmp, condition, left, right, info)); |
|
2173 |
} |
|
2174 |
void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { |
|
2175 |
cmp(condition, left, LIR_OprFact::intConst(right), info); |
|
2176 |
} |
|
2177 |
||
2178 |
void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); |
|
2179 |
void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); |
|
2180 |
||
7713
1e06d2419258
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
7427
diff
changeset
|
2181 |
void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { |
1e06d2419258
7009231: C1: Incorrect CAS code for longs on SPARC 32bit
iveresov
parents:
7427
diff
changeset
|
2182 |
append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); |
1 | 2183 |
} |
2184 |
||
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2185 |
void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2186 |
LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2187 |
void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2188 |
LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2189 |
void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2190 |
LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
1 | 2191 |
|
2192 |
void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } |
|
2193 |
void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } |
|
3800
3195b4844b5a
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
1217
diff
changeset
|
2194 |
void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } |
3195b4844b5a
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
1217
diff
changeset
|
2195 |
void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } |
1 | 2196 |
void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } |
2197 |
void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } |
|
2198 |
void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } |
|
12739
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
2199 |
void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); } |
09f26b73ae66
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
11886
diff
changeset
|
2200 |
void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); } |
1 | 2201 |
|
2202 |
void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } |
|
2203 |
void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } |
|
2204 |
void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } |
|
2205 |
void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } |
|
2206 |
void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } |
|
2207 |
void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } |
|
2208 |
void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } |
|
2209 |
||
2210 |
void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); |
|
2211 |
void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); |
|
2212 |
||
2213 |
void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); |
|
2214 |
||
2215 |
void prefetch(LIR_Address* addr, bool is_store); |
|
2216 |
||
2217 |
void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); |
|
2218 |
void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); |
|
2219 |
void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); |
|
2220 |
void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); |
|
2221 |
void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); |
|
2222 |
||
2223 |
void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); |
|
2224 |
void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); |
|
2225 |
void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); |
|
2226 |
void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); |
|
2227 |
||
2228 |
void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); |
|
2229 |
void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); |
|
2230 |
||
2231 |
// jump is an unconditional branch |
|
2232 |
void jump(BlockBegin* block) { |
|
2233 |
append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); |
|
2234 |
} |
|
2235 |
void jump(CodeStub* stub) { |
|
2236 |
append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); |
|
2237 |
} |
|
11563 | 2238 |
void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } |
1 | 2239 |
void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { |
2240 |
assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); |
|
2241 |
append(new LIR_OpBranch(cond, type, block)); |
|
2242 |
} |
|
2243 |
void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { |
|
2244 |
assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); |
|
2245 |
append(new LIR_OpBranch(cond, type, stub)); |
|
2246 |
} |
|
2247 |
void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { |
|
2248 |
assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); |
|
2249 |
append(new LIR_OpBranch(cond, type, block, unordered)); |
|
2250 |
} |
|
2251 |
||
2252 |
void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); |
|
2253 |
void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); |
|
2254 |
void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); |
|
2255 |
||
2256 |
void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } |
|
2257 |
void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } |
|
2258 |
void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } |
|
2259 |
||
2260 |
void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } |
|
2261 |
void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); |
|
2262 |
||
2263 |
void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { |
|
2264 |
append(new LIR_OpRTCall(routine, tmp, result, arguments)); |
|
2265 |
} |
|
2266 |
||
2267 |
void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, |
|
2268 |
LIR_OprList* arguments, CodeEmitInfo* info) { |
|
2269 |
append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); |
|
2270 |
} |
|
2271 |
||
2272 |
void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
2273 |
void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); |
1 | 2274 |
void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); |
2275 |
||
2276 |
void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } |
|
2277 |
void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } |
|
2278 |
void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } |
|
2279 |
||
2280 |
void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } |
|
2281 |
||
18507
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
2282 |
void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); } |
61bfc8995bb3
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
17011
diff
changeset
|
2283 |
|
1 | 2284 |
void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } |
2285 |
||
6461
cfc616b49f58
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
6453
diff
changeset
|
2286 |
void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); |
10562 | 2287 |
void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); |
6453 | 2288 |
|
1 | 2289 |
void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, |
2290 |
LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, |
|
2291 |
CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, |
|
2292 |
ciMethod* profiled_method, int profiled_bci); |
|
13728
882756847a04
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
13391
diff
changeset
|
2293 |
// MethodData* profiling |
13391
30245956af37
7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents:
12739
diff
changeset
|
2294 |
void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { |
20702
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
2295 |
append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass)); |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
2296 |
} |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
2297 |
void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) { |
bbe0fcde6e13
8023657: New type profiling points: arguments to call
roland
parents:
19710
diff
changeset
|
2298 |
append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict)); |
6453 | 2299 |
} |
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2300 |
|
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2301 |
void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); } |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2302 |
void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); } |
16611 | 2303 |
#ifdef ASSERT |
2304 |
void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); } |
|
2305 |
#endif |
|
1 | 2306 |
}; |
2307 |
||
2308 |
void print_LIR(BlockList* blocks); |
|
2309 |
||
2310 |
class LIR_InsertionBuffer : public CompilationResourceObj { |
|
2311 |
private: |
|
2312 |
LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) |
|
2313 |
||
2314 |
// list of insertion points. index and count are stored alternately: |
|
2315 |
// _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted |
|
2316 |
// _index_and_count[i * 2 + 1]: the number of ops to be inserted at index |
|
2317 |
intStack _index_and_count; |
|
2318 |
||
2319 |
// the LIR_Ops to be inserted |
|
2320 |
LIR_OpList _ops; |
|
2321 |
||
2322 |
void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } |
|
2323 |
void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } |
|
2324 |
void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } |
|
2325 |
||
2326 |
#ifdef ASSERT |
|
2327 |
void verify(); |
|
2328 |
#endif |
|
2329 |
public: |
|
2330 |
LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } |
|
2331 |
||
2332 |
// must be called before using the insertion buffer |
|
2333 |
void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } |
|
2334 |
bool initialized() const { return _lir != NULL; } |
|
2335 |
// called automatically when the buffer is appended to the LIR_List |
|
2336 |
void finish() { _lir = NULL; } |
|
2337 |
||
2338 |
// accessors |
|
2339 |
LIR_List* lir_list() const { return _lir; } |
|
2340 |
int number_of_insertion_points() const { return _index_and_count.length() >> 1; } |
|
2341 |
int index_at(int i) const { return _index_and_count.at((i << 1)); } |
|
2342 |
int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } |
|
2343 |
||
2344 |
int number_of_ops() const { return _ops.length(); } |
|
2345 |
LIR_Op* op_at(int i) const { return _ops.at(i); } |
|
2346 |
||
2347 |
// append an instruction to the buffer |
|
2348 |
void append(int index, LIR_Op* op); |
|
2349 |
||
2350 |
// instruction |
|
2351 |
void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } |
|
2352 |
}; |
|
2353 |
||
2354 |
||
2355 |
// |
|
2356 |
// LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. |
|
2357 |
// Calling a LIR_Op's visit function with a LIR_OpVisitState causes |
|
2358 |
// information about the input, output and temporaries used by the |
|
2359 |
// op to be recorded. It also records whether the op has call semantics |
|
2360 |
// and also records all the CodeEmitInfos used by this op. |
|
2361 |
// |
|
2362 |
||
2363 |
||
2364 |
class LIR_OpVisitState: public StackObj { |
|
2365 |
public: |
|
2366 |
typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; |
|
2367 |
||
2368 |
enum { |
|
15108
25a01874cc47
8004051: assert(_oprs_len[mode] < maxNumberOfOperands) failed: array overflow
bpittore
parents:
13886
diff
changeset
|
2369 |
maxNumberOfOperands = 20, |
1 | 2370 |
maxNumberOfInfos = 4 |
2371 |
}; |
|
2372 |
||
2373 |
private: |
|
2374 |
LIR_Op* _op; |
|
2375 |
||
2376 |
// optimization: the operands and infos are not stored in a variable-length |
|
2377 |
// list, but in a fixed-size array to save time of size checks and resizing |
|
2378 |
int _oprs_len[numModes]; |
|
2379 |
LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; |
|
2380 |
int _info_len; |
|
2381 |
CodeEmitInfo* _info_new[maxNumberOfInfos]; |
|
2382 |
||
2383 |
bool _has_call; |
|
2384 |
bool _has_slow_case; |
|
2385 |
||
2386 |
||
2387 |
// only include register operands |
|
2388 |
// addresses are decomposed to the base and index registers |
|
2389 |
// constants and stack operands are ignored |
|
2390 |
void append(LIR_Opr& opr, OprMode mode) { |
|
2391 |
assert(opr->is_valid(), "should not call this otherwise"); |
|
2392 |
assert(mode >= 0 && mode < numModes, "bad mode"); |
|
2393 |
||
2394 |
if (opr->is_register()) { |
|
2395 |
assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); |
|
2396 |
_oprs_new[mode][_oprs_len[mode]++] = &opr; |
|
2397 |
||
2398 |
} else if (opr->is_pointer()) { |
|
2399 |
LIR_Address* address = opr->as_address_ptr(); |
|
2400 |
if (address != NULL) { |
|
2401 |
// special handling for addresses: add base and index register of the address |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2402 |
// both are always input operands or temp if we want to extend |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2403 |
// their liveness! |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2404 |
if (mode == outputMode) { |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2405 |
mode = inputMode; |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2406 |
} |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2407 |
assert (mode == inputMode || mode == tempMode, "input or temp only for addresses"); |
1 | 2408 |
if (address->_base->is_valid()) { |
2409 |
assert(address->_base->is_register(), "must be"); |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2410 |
assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2411 |
_oprs_new[mode][_oprs_len[mode]++] = &address->_base; |
1 | 2412 |
} |
2413 |
if (address->_index->is_valid()) { |
|
2414 |
assert(address->_index->is_register(), "must be"); |
|
13886
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2415 |
assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); |
8d82c4dfa722
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
13742
diff
changeset
|
2416 |
_oprs_new[mode][_oprs_len[mode]++] = &address->_index; |
1 | 2417 |
} |
2418 |
||
2419 |
} else { |
|
2420 |
assert(opr->is_constant(), "constant operands are not processed"); |
|
2421 |
} |
|
2422 |
} else { |
|
2423 |
assert(opr->is_stack(), "stack operands are not processed"); |
|
2424 |
} |
|
2425 |
} |
|
2426 |
||
2427 |
void append(CodeEmitInfo* info) { |
|
2428 |
assert(info != NULL, "should not call this otherwise"); |
|
2429 |
assert(_info_len < maxNumberOfInfos, "array overflow"); |
|
2430 |
_info_new[_info_len++] = info; |
|
2431 |
} |
|
2432 |
||
2433 |
public: |
|
2434 |
LIR_OpVisitState() { reset(); } |
|
2435 |
||
2436 |
LIR_Op* op() const { return _op; } |
|
2437 |
void set_op(LIR_Op* op) { reset(); _op = op; } |
|
2438 |
||
2439 |
bool has_call() const { return _has_call; } |
|
2440 |
bool has_slow_case() const { return _has_slow_case; } |
|
2441 |
||
2442 |
void reset() { |
|
2443 |
_op = NULL; |
|
2444 |
_has_call = false; |
|
2445 |
_has_slow_case = false; |
|
2446 |
||
2447 |
_oprs_len[inputMode] = 0; |
|
2448 |
_oprs_len[tempMode] = 0; |
|
2449 |
_oprs_len[outputMode] = 0; |
|
2450 |
_info_len = 0; |
|
2451 |
} |
|
2452 |
||
2453 |
||
2454 |
int opr_count(OprMode mode) const { |
|
2455 |
assert(mode >= 0 && mode < numModes, "bad mode"); |
|
2456 |
return _oprs_len[mode]; |
|
2457 |
} |
|
2458 |
||
2459 |
LIR_Opr opr_at(OprMode mode, int index) const { |
|
2460 |
assert(mode >= 0 && mode < numModes, "bad mode"); |
|
2461 |
assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); |
|
2462 |
return *_oprs_new[mode][index]; |
|
2463 |
} |
|
2464 |
||
2465 |
void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { |
|
2466 |
assert(mode >= 0 && mode < numModes, "bad mode"); |
|
2467 |
assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); |
|
2468 |
*_oprs_new[mode][index] = opr; |
|
2469 |
} |
|
2470 |
||
2471 |
int info_count() const { |
|
2472 |
return _info_len; |
|
2473 |
} |
|
2474 |
||
2475 |
CodeEmitInfo* info_at(int index) const { |
|
2476 |
assert(index < _info_len, "index out of bounds"); |
|
2477 |
return _info_new[index]; |
|
2478 |
} |
|
2479 |
||
2480 |
XHandlers* all_xhandler(); |
|
2481 |
||
2482 |
// collects all register operands of the instruction |
|
2483 |
void visit(LIR_Op* op); |
|
2484 |
||
15937 | 2485 |
#ifdef ASSERT |
1 | 2486 |
// check that an operation has no operands |
2487 |
bool no_operands(LIR_Op* op); |
|
2488 |
#endif |
|
2489 |
||
2490 |
// LIR_Op visitor functions use these to fill in the state |
|
2491 |
void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } |
|
2492 |
void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } |
|
2493 |
void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } |
|
2494 |
void do_info(CodeEmitInfo* info) { append(info); } |
|
2495 |
||
2496 |
void do_stub(CodeStub* stub); |
|
2497 |
void do_call() { _has_call = true; } |
|
2498 |
void do_slow_case() { _has_slow_case = true; } |
|
2499 |
void do_slow_case(CodeEmitInfo* info) { |
|
2500 |
_has_slow_case = true; |
|
2501 |
append(info); |
|
2502 |
} |
|
2503 |
}; |
|
2504 |
||
2505 |
||
2506 |
inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; |
|
7397 | 2507 |
|
2508 |
#endif // SHARE_VM_C1_C1_LIR_HPP |