/*

 * Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.

 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

 *

 * This code is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 only, as

 * published by the Free Software Foundation.

 *

 * This code is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * version 2 for more details (a copy is included in the LICENSE file that

 * accompanied this code).

 *

 * You should have received a copy of the GNU General Public License version

 * 2 along with this work; if not, write to the Free Software Foundation,

 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

 *

 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

 * or visit www.oracle.com if you need additional information or have any

 * questions.

 *

 */

#include "precompiled.hpp"

#include "asm/macroAssembler.inline.hpp"

#include "c1/c1_Compilation.hpp"

#include "c1/c1_FrameMap.hpp"

#include "c1/c1_Instruction.hpp"

#include "c1/c1_LIRAssembler.hpp"

#include "c1/c1_LIRGenerator.hpp"

#include "c1/c1_Runtime1.hpp"

#include "c1/c1_ValueStack.hpp"

#include "ci/ciArray.hpp"

#include "ci/ciObjArrayKlass.hpp"

#include "ci/ciTypeArrayKlass.hpp"

#include "ci/ciUtilities.hpp"

#include "gc/shared/c1/barrierSetC1.hpp"

#include "gc/shared/cardTable.hpp"

#include "gc/shared/cardTableBarrierSet.hpp"

#include "runtime/sharedRuntime.hpp"

#include "runtime/stubRoutines.hpp"

#include "vmreg_arm.inline.hpp"

#ifdef ASSERT

#define __ gen()->lir(__FILE__, __LINE__)->

#else

#define __ gen()->lir()->

#endif

void LIRItem::load_byte_item() {

  load_item();

}

void LIRItem::load_nonconstant() {

  LIR_Opr r = value()->operand();

  if (_gen->can_inline_as_constant(value())) {

    if (!r->is_constant()) {

      r = LIR_OprFact::value_type(value()->type());

    }

    _result = r;

  } else {

    load_item();

  }

}

//--------------------------------------------------------------

//               LIRGenerator

//--------------------------------------------------------------

LIR_Opr LIRGenerator::exceptionOopOpr() {

  return FrameMap::Exception_oop_opr;

}

LIR_Opr LIRGenerator::exceptionPcOpr()  {

  return FrameMap::Exception_pc_opr;

}

LIR_Opr LIRGenerator::syncLockOpr()     {

  return new_register(T_INT);

}

LIR_Opr LIRGenerator::syncTempOpr()     {

  return new_register(T_OBJECT);

}

LIR_Opr LIRGenerator::getThreadTemp()   {

  return LIR_OprFact::illegalOpr;

}

LIR_Opr LIRGenerator::atomicLockOpr() {

  return LIR_OprFact::illegalOpr;

}

LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {

  LIR_Opr opr;

  switch (type->tag()) {

    case intTag:     opr = FrameMap::Int_result_opr;    break;

    case objectTag:  opr = FrameMap::Object_result_opr; break;

    case longTag:    opr = FrameMap::Long_result_opr;   break;

    case floatTag:   opr = FrameMap::Float_result_opr;  break;

    case doubleTag:  opr = FrameMap::Double_result_opr; break;

    case addressTag:

    default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;

  }

  assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");

  return opr;

}

LIR_Opr LIRGenerator::rlock_byte(BasicType type) {

  return new_register(T_INT);

}

//--------- loading items into registers --------------------------------

bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {

  return false;

}

bool LIRGenerator::can_inline_as_constant(Value v) const {

  if (v->type()->as_IntConstant() != NULL) {

    return Assembler::is_arith_imm_in_range(v->type()->as_IntConstant()->value());

  } else if (v->type()->as_ObjectConstant() != NULL) {

    return v->type()->as_ObjectConstant()->value()->is_null_object();

  } else if (v->type()->as_FloatConstant() != NULL) {

    return v->type()->as_FloatConstant()->value() == 0.0f;

  } else if (v->type()->as_DoubleConstant() != NULL) {

    return v->type()->as_DoubleConstant()->value() == 0.0;

  }

  return false;

}

bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {

  ShouldNotCallThis(); // Not used on ARM

  return false;

}

LIR_Opr LIRGenerator::safepoint_poll_register() {

  return LIR_OprFact::illegalOpr;

}

static LIR_Opr make_constant(BasicType type, jlong c) {

  switch (type) {

    case T_ADDRESS:

    case T_OBJECT:  return LIR_OprFact::intptrConst(c);

    case T_LONG:    return LIR_OprFact::longConst(c);

    case T_INT:     return LIR_OprFact::intConst(c);

    default: ShouldNotReachHere();

    return LIR_OprFact::intConst(-1);

  }

}

void LIRGenerator::add_large_constant(LIR_Opr src, int c, LIR_Opr dest) {

  assert(c != 0, "must be");

  // Find first non-zero bit

  int shift = 0;

  while ((c & (3 << shift)) == 0) {

    shift += 2;

  }

  // Add the least significant part of the constant

  int mask = 0xff << shift;

  __ add(src, LIR_OprFact::intConst(c & mask), dest);

  // Add up to 3 other parts of the constant;

  // each of them can be represented as rotated_imm

  if (c & (mask << 8)) {

    __ add(dest, LIR_OprFact::intConst(c & (mask << 8)), dest);

  }

  if (c & (mask << 16)) {

    __ add(dest, LIR_OprFact::intConst(c & (mask << 16)), dest);

  }

  if (c & (mask << 24)) {

    __ add(dest, LIR_OprFact::intConst(c & (mask << 24)), dest);

  }

}

static LIR_Address* make_address(LIR_Opr base, LIR_Opr index, LIR_Address::Scale scale, BasicType type) {

  return new LIR_Address(base, index, scale, 0, type);

}

LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,

                                            int shift, int disp, BasicType type) {

  assert(base->is_register(), "must be");

  if (index->is_constant()) {

    disp += index->as_constant_ptr()->as_jint() << shift;

    index = LIR_OprFact::illegalOpr;

  }

  if (base->type() == T_LONG) {

    LIR_Opr tmp = new_register(T_INT);

    __ convert(Bytecodes::_l2i, base, tmp);

    base = tmp;

  }

  if (index != LIR_OprFact::illegalOpr && index->type() == T_LONG) {

    LIR_Opr tmp = new_register(T_INT);

    __ convert(Bytecodes::_l2i, index, tmp);

    index = tmp;

  }

  // At this point base and index should be all ints and not constants

  assert(base->is_single_cpu() && !base->is_constant(), "base should be an non-constant int");

  assert(index->is_illegal() || (index->type() == T_INT && !index->is_constant()), "index should be an non-constant int");

  int max_disp;

  bool disp_is_in_range;

  bool embedded_shift;

  switch (type) {

    case T_BYTE:

    case T_SHORT:

    case T_CHAR:

      max_disp = 256;          // ldrh, ldrsb encoding has 8-bit offset

      embedded_shift = false;

      break;

    case T_FLOAT:

    case T_DOUBLE:

      max_disp = 1024;         // flds, fldd have 8-bit offset multiplied by 4

      embedded_shift = false;

      break;

    case T_LONG:

      max_disp = 4096;

      embedded_shift = false;

      break;

    default:

      max_disp = 4096;         // ldr, ldrb allow 12-bit offset

      embedded_shift = true;

  }

  disp_is_in_range = (-max_disp < disp && disp < max_disp);

  if (index->is_register()) {

    LIR_Opr tmp = new_pointer_register();

    if (!disp_is_in_range) {

      add_large_constant(base, disp, tmp);

      base = tmp;

      disp = 0;

    }

    LIR_Address* addr = make_address(base, index, (LIR_Address::Scale)shift, type);

    if (disp == 0 && embedded_shift) {

      // can use ldr/str instruction with register index

      return addr;

    } else {

      LIR_Opr tmp = new_pointer_register();

      __ add(base, LIR_OprFact::address(addr), tmp); // add with shifted/extended register

      return new LIR_Address(tmp, disp, type);

    }

  }

  // If the displacement is too large to be inlined into LDR instruction,

  // generate large constant with additional sequence of ADD instructions

  int excess_disp = disp & ~(max_disp - 1);

  if (excess_disp != 0) {

    LIR_Opr tmp = new_pointer_register();

    add_large_constant(base, excess_disp, tmp);

    base = tmp;

  }

  return new LIR_Address(base, disp & (max_disp - 1), type);

}

LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, BasicType type) {

  int base_offset = arrayOopDesc::base_offset_in_bytes(type);

  int elem_size = type2aelembytes(type);

  if (index_opr->is_constant()) {

    int offset = base_offset + index_opr->as_constant_ptr()->as_jint() * elem_size;

    return generate_address(array_opr, offset, type);

  } else {

    assert(index_opr->is_register(), "must be");

    int scale = exact_log2(elem_size);

    return generate_address(array_opr, index_opr, scale, base_offset, type);

  }

}

LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {

  assert(type == T_LONG || type == T_INT, "should be");

  LIR_Opr r = make_constant(type, x);

  bool imm_in_range = AsmOperand::is_rotated_imm(x);

  if (!imm_in_range) {

    LIR_Opr tmp = new_register(type);

    __ move(r, tmp);

    return tmp;

  }

  return r;

}

void LIRGenerator::increment_counter(address counter, BasicType type, int step) {

  LIR_Opr pointer = new_pointer_register();

  __ move(LIR_OprFact::intptrConst(counter), pointer);

  LIR_Address* addr = new LIR_Address(pointer, type);

  increment_counter(addr, step);

}

void LIRGenerator::increment_counter(LIR_Address* addr, int step) {

  LIR_Opr temp = new_register(addr->type());

  __ move(addr, temp);

  __ add(temp, make_constant(addr->type(), step), temp);

  __ move(temp, addr);

}

void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {

  __ load(new LIR_Address(base, disp, T_INT), FrameMap::LR_opr, info);

  __ cmp(condition, FrameMap::LR_opr, c);

}

void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {

  __ load(new LIR_Address(base, disp, type), FrameMap::LR_opr, info);

  __ cmp(condition, reg, FrameMap::LR_opr);

}

bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {

  assert(left != result, "should be different registers");

  if (is_power_of_2(c + 1)) {

    LIR_Address::Scale scale = (LIR_Address::Scale) log2_intptr(c + 1);

    LIR_Address* addr = new LIR_Address(left, left, scale, 0, T_INT);

    __ sub(LIR_OprFact::address(addr), left, result); // rsb with shifted register

    return true;

  } else if (is_power_of_2(c - 1)) {

    LIR_Address::Scale scale = (LIR_Address::Scale) log2_intptr(c - 1);

    LIR_Address* addr = new LIR_Address(left, left, scale, 0, T_INT);

    __ add(left, LIR_OprFact::address(addr), result); // add with shifted register

    return true;

  }

  return false;

}

void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {

  assert(item->type() == T_INT, "other types are not expected");

  __ store(item, new LIR_Address(FrameMap::SP_opr, in_bytes(offset_from_sp), item->type()));

}

void LIRGenerator::set_card(LIR_Opr value, LIR_Address* card_addr) {

  assert(CardTable::dirty_card_val() == 0,

    "Cannot use the register containing the card table base address directly");

  if((ci_card_table_address_as<intx>() & 0xff) == 0) {

    // If the card table base address is aligned to 256 bytes, we can use the register

    // that contains the card_table_base_address.

    __ move(value, card_addr);

  } else {

    // Otherwise we need to create a register containing that value.

    LIR_Opr tmp_zero = new_register(T_INT);

    __ move(LIR_OprFact::intConst(CardTable::dirty_card_val()), tmp_zero);

    __ move(tmp_zero, card_addr);

  }

}

void LIRGenerator::CardTableBarrierSet_post_barrier_helper(LIR_OprDesc* addr, LIR_Const* card_table_base) {

  assert(addr->is_register(), "must be a register at this point");

  CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());

  CardTable* ct = ctbs->card_table();

  LIR_Opr tmp = FrameMap::LR_ptr_opr;

  bool load_card_table_base_const = VM_Version::supports_movw();

  if (load_card_table_base_const) {

    __ move((LIR_Opr)card_table_base, tmp);

  } else {

    __ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);

  }

  // Use unsigned type T_BOOLEAN here rather than (signed) T_BYTE since signed load

  // byte instruction does not support the addressing mode we need.

  LIR_Address* card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTable::card_shift, 0, T_BOOLEAN);

  if (UseCondCardMark) {

    if (ct->scanned_concurrently()) {

      __ membar_storeload();

    }

    LIR_Opr cur_value = new_register(T_INT);

    __ move(card_addr, cur_value);

    LabelObj* L_already_dirty = new LabelObj();

    __ cmp(lir_cond_equal, cur_value, LIR_OprFact::intConst(CardTable::dirty_card_val()));

    __ branch(lir_cond_equal, T_BYTE, L_already_dirty->label());

    set_card(tmp, card_addr);

    __ branch_destination(L_already_dirty->label());

  } else {

    if (ct->scanned_concurrently()) {

      __ membar_storestore();

    }

    set_card(tmp, card_addr);

  }

}

void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {

  LIR_Opr tmp1 = FrameMap::R0_oop_opr;

  LIR_Opr tmp2 = FrameMap::R1_oop_opr;

  LIR_Opr tmp3 = LIR_OprFact::illegalOpr;

  __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);

}

//----------------------------------------------------------------------

//             visitor functions

//----------------------------------------------------------------------

void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {

  assert(x->is_pinned(),"");

  LIRItem obj(x->obj(), this);

  obj.load_item();

  set_no_result(x);

  LIR_Opr lock = new_pointer_register();

  LIR_Opr hdr  = new_pointer_register();

  // Need a scratch register for biased locking on arm

  LIR_Opr scratch = LIR_OprFact::illegalOpr;

  if(UseBiasedLocking) {

    scratch = new_pointer_register();

  } else {

    scratch = atomicLockOpr();

  }

  CodeEmitInfo* info_for_exception = NULL;

  if (x->needs_null_check()) {

    info_for_exception = state_for(x);

  }

  CodeEmitInfo* info = state_for(x, x->state(), true);

  monitor_enter(obj.result(), lock, hdr, scratch,

                x->monitor_no(), info_for_exception, info);

}

void LIRGenerator::do_MonitorExit(MonitorExit* x) {

  assert(x->is_pinned(),"");

  LIRItem obj(x->obj(), this);

  obj.dont_load_item();

  set_no_result(x);

  LIR_Opr obj_temp = new_pointer_register();

  LIR_Opr lock     = new_pointer_register();

  LIR_Opr hdr      = new_pointer_register();

  monitor_exit(obj_temp, lock, hdr, atomicLockOpr(), x->monitor_no());

}

// _ineg, _lneg, _fneg, _dneg

void LIRGenerator::do_NegateOp(NegateOp* x) {

#ifdef __SOFTFP__

  address runtime_func = NULL;

  ValueTag tag = x->type()->tag();

  if (tag == floatTag) {

    runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fneg);

  } else if (tag == doubleTag) {

    runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dneg);

  }

  if (runtime_func != NULL) {

    set_result(x, call_runtime(x->x(), runtime_func, x->type(), NULL));

    return;

  }

#endif // __SOFTFP__

  LIRItem value(x->x(), this);

  value.load_item();

  LIR_Opr reg = rlock_result(x);

  __ negate(value.result(), reg);

}

// for  _fadd, _fmul, _fsub, _fdiv, _frem

//      _dadd, _dmul, _dsub, _ddiv, _drem

void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {

  address runtime_func;

  switch (x->op()) {

    case Bytecodes::_frem:

      runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::frem);

      break;

    case Bytecodes::_drem:

      runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::drem);

      break;

#ifdef __SOFTFP__

    // Call function compiled with -msoft-float.

      // __aeabi_XXXX_glibc: Imported code from glibc soft-fp bundle for calculation accuracy improvement. See CR 6757269.

    case Bytecodes::_fadd:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fadd_glibc);

      break;

    case Bytecodes::_fmul:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fmul);

      break;

    case Bytecodes::_fsub:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fsub_glibc);

      break;

    case Bytecodes::_fdiv:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fdiv);

      break;

    case Bytecodes::_dadd:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dadd_glibc);

      break;

    case Bytecodes::_dmul:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dmul);

      break;

    case Bytecodes::_dsub:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dsub_glibc);

      break;

    case Bytecodes::_ddiv:

      runtime_func = CAST_FROM_FN_PTR(address, __aeabi_ddiv);

      break;

    default:

      ShouldNotReachHere();

#else // __SOFTFP__

    default: {

      LIRItem left(x->x(), this);

      LIRItem right(x->y(), this);

      left.load_item();