8164002: Add a new CPU family (S_family) for SPARC S7 and above processors
authormwalsh
Wed, 19 Oct 2016 10:48:48 -0700
changeset 42024 f3ee61fe224c
parent 42020 8eacd62bf4f7
child 42025 6f480cdf6037
8164002: Add a new CPU family (S_family) for SPARC S7 and above processors Reviewed-by: dholmes, ecaspole, kvn
hotspot/src/cpu/sparc/vm/vm_version_sparc.cpp
hotspot/src/cpu/sparc/vm/vm_version_sparc.hpp
--- a/hotspot/src/cpu/sparc/vm/vm_version_sparc.cpp	Tue Oct 18 14:27:48 2016 +0300
+++ b/hotspot/src/cpu/sparc/vm/vm_version_sparc.cpp	Wed Oct 19 10:48:48 2016 -0700
@@ -457,9 +457,10 @@
 
 unsigned int VM_Version::calc_parallel_worker_threads() {
   unsigned int result;
-  if (is_M_series()) {
-    // for now, use same gc thread calculation for M-series as for niagara-plus
-    // in future, we may want to tweak parameters for nof_parallel_worker_thread
+  if (is_M_series() || is_S_series()) {
+    // for now, use same gc thread calculation for M-series and S-series as for
+    // niagara-plus. In future, we may want to tweak parameters for
+    // nof_parallel_worker_thread
     result = nof_parallel_worker_threads(5, 16, 8);
   } else if (is_niagara_plus()) {
     result = nof_parallel_worker_threads(5, 16, 8);
@@ -483,6 +484,9 @@
   } else if (strstr(impl, "SPARC-M") != NULL) {
     // M-series SPARC is based on T-series.
     features |= (M_family_m | T_family_m);
+  } else if (strstr(impl, "SPARC-S") != NULL) {
+    // S-series SPARC is based on T-series.
+    features |= (S_family_m | T_family_m);
   } else if (strstr(impl, "SPARC-T") != NULL) {
     features |= T_family_m;
     if (strstr(impl, "SPARC-T1") != NULL) {
--- a/hotspot/src/cpu/sparc/vm/vm_version_sparc.hpp	Tue Oct 18 14:27:48 2016 +0300
+++ b/hotspot/src/cpu/sparc/vm/vm_version_sparc.hpp	Wed Oct 19 10:48:48 2016 -0700
@@ -49,14 +49,15 @@
     cbcond_instructions   = 12,
     sparc64_family        = 13,
     M_family              = 14,
-    T_family              = 15,
-    T1_model              = 16,
-    sparc5_instructions   = 17,
-    aes_instructions      = 18,
-    sha1_instruction      = 19,
-    sha256_instruction    = 20,
-    sha512_instruction    = 21,
-    crc32c_instruction    = 22
+    S_family              = 15,
+    T_family              = 16,
+    T1_model              = 17,
+    sparc5_instructions   = 18,
+    aes_instructions      = 19,
+    sha1_instruction      = 20,
+    sha256_instruction    = 21,
+    sha512_instruction    = 22,
+    crc32c_instruction    = 23
   };
 
   enum Feature_Flag_Set {
@@ -78,6 +79,7 @@
     cbcond_instructions_m   = 1 << cbcond_instructions,
     sparc64_family_m        = 1 << sparc64_family,
     M_family_m              = 1 << M_family,
+    S_family_m              = 1 << S_family,
     T_family_m              = 1 << T_family,
     T1_model_m              = 1 << T1_model,
     sparc5_instructions_m   = 1 << sparc5_instructions,
@@ -105,6 +107,7 @@
 
   // Returns true if the platform is in the niagara line (T series)
   static bool is_M_family(int features) { return (features & M_family_m) != 0; }
+  static bool is_S_family(int features) { return (features & S_family_m) != 0; }
   static bool is_T_family(int features) { return (features & T_family_m) != 0; }
   static bool is_niagara() { return is_T_family(_features); }
 #ifdef ASSERT
@@ -153,6 +156,7 @@
   static bool is_niagara_plus()         { return is_T_family(_features) && !is_T1_model(_features); }
 
   static bool is_M_series()             { return is_M_family(_features); }
+  static bool is_S_series()             { return is_S_family(_features); }
   static bool is_T4()                   { return is_T_family(_features) && has_cbcond(); }
   static bool is_T7()                   { return is_T_family(_features) && has_sparc5_instr(); }