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8213826: Disable ARMv6 memory barriers on ARMv5 processors
authordholmes
Tue, 13 Nov 2018 21:43:10 -0500
changeset 52513 d4f3e37d1fda
parent 52512 1838347a803b
child 52514 f4e3900c8d08
8213826: Disable ARMv6 memory barriers on ARMv5 processors Reviewed-by: dholmes, bulasevich Contributed-by: Jakub Vanek <linuxtardis@gmail.com>
src/hotspot/cpu/arm/assembler_arm_32.hpp file | annotate | diff | comparison | revisions
src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp file | annotate | diff | comparison | revisions 
--- a/src/hotspot/cpu/arm/assembler_arm_32.hpp	Tue Nov 13 18:22:52 2018 -0800
+++ b/src/hotspot/cpu/arm/assembler_arm_32.hpp	Tue Nov 13 21:43:10 2018 -0500
@@ -498,7 +498,7 @@
   void dmb(DMB_Opt opt, Register reg) {
     if (VM_Version::arm_arch() >= 7) {
       emit_int32(0xF57FF050 | opt);
-    } else {
+    } else if (VM_Version::arm_arch() == 6) {
       bool preserve_tmp = (reg == noreg);
       if(preserve_tmp) {
         reg = Rtemp;
--- a/src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp	Tue Nov 13 18:22:52 2018 -0800
+++ b/src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp	Tue Nov 13 21:43:10 2018 -0500
@@ -63,7 +63,7 @@
      __asm__ volatile (
      ".word 0xF57FF050 | 0xf" : : : "memory");
 #endif
-   } else {
+   } else if (VM_Version::arm_arch() == 6) {
      intptr_t zero = 0;
      __asm__ volatile (
        "mcr p15, 0, %0, c7, c10, 5"
@@ -80,7 +80,7 @@
      __asm__ volatile (
      ".word 0xF57FF050 | 0xe" : : : "memory");
 #endif
-   } else {
+   } else if (VM_Version::arm_arch() == 6) {
      intptr_t zero = 0;
      __asm__ volatile (
        "mcr p15, 0, %0, c7, c10, 5"
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