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8210578: AArch64: Invalid encoding for fmlsvs instruction
authoradinn
Wed, 12 Sep 2018 09:12:42 +0100
changeset 51707 8c7198cac800
parent 51706 be8fe2a352be
child 51708 469ab7c92a32
8210578: AArch64: Invalid encoding for fmlsvs instruction Summary: sub_op code for fmslvs should be 1 not 0 Reviewed-by: roland
src/hotspot/cpu/aarch64/assembler_aarch64.hpp file | annotate | diff | comparison | revisions 
--- a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp	Wed Sep 12 09:23:36 2018 +0200
+++ b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp	Wed Sep 12 09:12:42 2018 +0100
@@ -2356,7 +2356,7 @@
 
   // FMLA/FMLS - Vector - Scalar
   INSN(fmlavs, 0, 0b0001);
-  INSN(fmlsvs, 0, 0b0001);
+  INSN(fmlsvs, 0, 0b0101);
   // FMULX - Vector - Scalar
   INSN(fmulxvs, 1, 0b1001);
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