6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
Summary: Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI.
Reviewed-by: phh, kvn
--- a/hotspot/src/cpu/sparc/vm/sparc.ad Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/cpu/sparc/vm/sparc.ad Mon Jan 26 16:22:12 2009 +0100
@@ -762,7 +762,7 @@
case Assembler::stdf_op3: st_op = Op_StoreD; break;
case Assembler::ldsb_op3: ld_op = Op_LoadB; break;
- case Assembler::lduh_op3: ld_op = Op_LoadC; break;
+ case Assembler::lduh_op3: ld_op = Op_LoadUS; break;
case Assembler::ldsh_op3: ld_op = Op_LoadS; break;
case Assembler::ldx_op3: // may become LoadP or stay LoadI
case Assembler::ldsw_op3: // may become LoadP or stay LoadI
@@ -5316,9 +5316,9 @@
ins_pipe(iload_mask_mem);
%}
-// Load Char (16bit UNsigned) into a Long Register
-instruct loadUCL(iRegL dst, memory mem, immL_FFFF bytemask) %{
- match(Set dst (AndL (ConvI2L (LoadC mem)) bytemask));
+// Load Unsigned Short/Char (16bit UNsigned) into a Long Register
+instruct loadUS2L(iRegL dst, memory mem, immL_FFFF bytemask) %{
+ match(Set dst (AndL (ConvI2L (LoadUS mem)) bytemask));
ins_cost(MEMORY_REF_COST);
size(4);
@@ -5328,9 +5328,9 @@
ins_pipe(iload_mask_mem);
%}
-// Load Char (16bit unsigned)
-instruct loadC(iRegI dst, memory mem) %{
- match(Set dst (LoadC mem));
+// Load Unsigned Short/Char (16bit unsigned)
+instruct loadUS(iRegI dst, memory mem) %{
+ match(Set dst (LoadUS mem));
ins_cost(MEMORY_REF_COST);
size(4);
--- a/hotspot/src/cpu/x86/vm/x86_32.ad Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/cpu/x86/vm/x86_32.ad Mon Jan 26 16:22:12 2009 +0100
@@ -6413,9 +6413,9 @@
ins_pipe( ialu_reg_mem );
%}
-// Load Char (16bit unsigned)
-instruct loadC(eRegI dst, memory mem) %{
- match(Set dst (LoadC mem));
+// Load Unsigned Short/Char (16bit unsigned)
+instruct loadUS(eRegI dst, memory mem) %{
+ match(Set dst (LoadUS mem));
ins_cost(125);
format %{ "MOVZX $dst,$mem" %}
--- a/hotspot/src/cpu/x86/vm/x86_64.ad Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/cpu/x86/vm/x86_64.ad Mon Jan 26 16:22:12 2009 +0100
@@ -6096,25 +6096,25 @@
// ins_pipe(ialu_reg_mem);
// %}
-// Load Char (16 bit UNsigned)
-instruct loadC(rRegI dst, memory mem)
-%{
- match(Set dst (LoadC mem));
+// Load Unsigned Short/Char (16 bit UNsigned)
+instruct loadUS(rRegI dst, memory mem)
+%{
+ match(Set dst (LoadUS mem));
ins_cost(125);
- format %{ "movzwl $dst, $mem\t# char" %}
+ format %{ "movzwl $dst, $mem\t# ushort/char" %}
opcode(0x0F, 0xB7);
ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem));
ins_pipe(ialu_reg_mem);
%}
-// Load Char (16 bit UNsigned) into long
-// instruct loadC2L(rRegL dst, memory mem)
+// Load Unsigned Short/Char (16 bit UNsigned) into long
+// instruct loadUS2L(rRegL dst, memory mem)
// %{
-// match(Set dst (ConvI2L (LoadC mem)));
+// match(Set dst (ConvI2L (LoadUS mem)));
// ins_cost(125);
-// format %{ "movzwl $dst, $mem\t# char -> long" %}
+// format %{ "movzwl $dst, $mem\t# ushort/char -> long" %}
// opcode(0x0F, 0xB7);
// ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem));
// ins_pipe(ialu_reg_mem);
--- a/hotspot/src/share/vm/adlc/forms.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/adlc/forms.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -248,7 +248,7 @@
// True if 'opType', an ideal name, loads or stores.
Form::DataType Form::is_load_from_memory(const char *opType) const {
if( strcmp(opType,"LoadB")==0 ) return Form::idealB;
- if( strcmp(opType,"LoadC")==0 ) return Form::idealC;
+ if( strcmp(opType,"LoadUS")==0 ) return Form::idealC;
if( strcmp(opType,"LoadD")==0 ) return Form::idealD;
if( strcmp(opType,"LoadD_unaligned")==0 ) return Form::idealD;
if( strcmp(opType,"LoadF")==0 ) return Form::idealF;
--- a/hotspot/src/share/vm/adlc/formssel.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/adlc/formssel.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -3314,7 +3314,7 @@
"StoreI","StoreL","StoreP","StoreN","StoreD","StoreF" ,
"StoreB","StoreC","Store" ,"StoreFP",
"LoadI" ,"LoadL", "LoadP" ,"LoadN", "LoadD" ,"LoadF" ,
- "LoadB" ,"LoadC" ,"LoadS" ,"Load" ,
+ "LoadB" ,"LoadUS" ,"LoadS" ,"Load" ,
"Store4I","Store2I","Store2L","Store2D","Store4F","Store2F","Store16B",
"Store8B","Store4B","Store8C","Store4C","Store2C",
"Load4I" ,"Load2I" ,"Load2L" ,"Load2D" ,"Load4F" ,"Load2F" ,"Load16B" ,
--- a/hotspot/src/share/vm/opto/classes.hpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/classes.hpp Mon Jan 26 16:22:12 2009 +0100
@@ -129,7 +129,7 @@
macro(LShiftI)
macro(LShiftL)
macro(LoadB)
-macro(LoadC)
+macro(LoadUS)
macro(LoadD)
macro(LoadD_unaligned)
macro(LoadF)
--- a/hotspot/src/share/vm/opto/compile.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/compile.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -2005,7 +2005,7 @@
case Op_StoreP:
case Op_StoreN:
case Op_LoadB:
- case Op_LoadC:
+ case Op_LoadUS:
case Op_LoadI:
case Op_LoadKlass:
case Op_LoadNKlass:
--- a/hotspot/src/share/vm/opto/lcm.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/lcm.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -107,7 +107,7 @@
was_store = false;
switch( mach->ideal_Opcode() ) {
case Op_LoadB:
- case Op_LoadC:
+ case Op_LoadUS:
case Op_LoadD:
case Op_LoadF:
case Op_LoadI:
--- a/hotspot/src/share/vm/opto/loopnode.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/loopnode.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -2654,7 +2654,7 @@
case Op_ModF:
case Op_ModD:
case Op_LoadB: // Same with Loads; they can sink
- case Op_LoadC: // during loop optimizations.
+ case Op_LoadUS: // during loop optimizations.
case Op_LoadD:
case Op_LoadF:
case Op_LoadI:
--- a/hotspot/src/share/vm/opto/matcher.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/matcher.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -1824,7 +1824,7 @@
mem_op = true;
break;
case Op_LoadB:
- case Op_LoadC:
+ case Op_LoadUS:
case Op_LoadD:
case Op_LoadF:
case Op_LoadI:
--- a/hotspot/src/share/vm/opto/memnode.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/memnode.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -779,14 +779,14 @@
"use LoadRangeNode instead");
switch (bt) {
case T_BOOLEAN:
- case T_BYTE: return new (C, 3) LoadBNode(ctl, mem, adr, adr_type, rt->is_int() );
- case T_INT: return new (C, 3) LoadINode(ctl, mem, adr, adr_type, rt->is_int() );
- case T_CHAR: return new (C, 3) LoadCNode(ctl, mem, adr, adr_type, rt->is_int() );
- case T_SHORT: return new (C, 3) LoadSNode(ctl, mem, adr, adr_type, rt->is_int() );
- case T_LONG: return new (C, 3) LoadLNode(ctl, mem, adr, adr_type, rt->is_long() );
- case T_FLOAT: return new (C, 3) LoadFNode(ctl, mem, adr, adr_type, rt );
- case T_DOUBLE: return new (C, 3) LoadDNode(ctl, mem, adr, adr_type, rt );
- case T_ADDRESS: return new (C, 3) LoadPNode(ctl, mem, adr, adr_type, rt->is_ptr() );
+ case T_BYTE: return new (C, 3) LoadBNode (ctl, mem, adr, adr_type, rt->is_int() );
+ case T_INT: return new (C, 3) LoadINode (ctl, mem, adr, adr_type, rt->is_int() );
+ case T_CHAR: return new (C, 3) LoadUSNode(ctl, mem, adr, adr_type, rt->is_int() );
+ case T_SHORT: return new (C, 3) LoadSNode (ctl, mem, adr, adr_type, rt->is_int() );
+ case T_LONG: return new (C, 3) LoadLNode (ctl, mem, adr, adr_type, rt->is_long() );
+ case T_FLOAT: return new (C, 3) LoadFNode (ctl, mem, adr, adr_type, rt );
+ case T_DOUBLE: return new (C, 3) LoadDNode (ctl, mem, adr, adr_type, rt );
+ case T_ADDRESS: return new (C, 3) LoadPNode (ctl, mem, adr, adr_type, rt->is_ptr() );
case T_OBJECT:
#ifdef _LP64
if (adr->bottom_type()->is_ptr_to_narrowoop()) {
@@ -1357,7 +1357,7 @@
// Steps (a), (b): Walk past independent stores to find an exact match.
if (prev_mem != NULL && prev_mem != in(MemNode::Memory)) {
// (c) See if we can fold up on the spot, but don't fold up here.
- // Fold-up might require truncation (for LoadB/LoadS/LoadC) or
+ // Fold-up might require truncation (for LoadB/LoadS/LoadUS) or
// just return a prior value, which is done by Identity calls.
if (can_see_stored_value(prev_mem, phase)) {
// Make ready for step (d):
@@ -1606,14 +1606,14 @@
return LoadNode::Ideal(phase, can_reshape);
}
-//--------------------------LoadCNode::Ideal--------------------------------------
+//--------------------------LoadUSNode::Ideal-------------------------------------
//
// If the previous store is to the same address as this load,
// and the value stored was larger than a char, replace this load
// with the value stored truncated to a char. If no truncation is
// needed, the replacement is done in LoadNode::Identity().
//
-Node *LoadCNode::Ideal(PhaseGVN *phase, bool can_reshape) {
+Node *LoadUSNode::Ideal(PhaseGVN *phase, bool can_reshape) {
Node* mem = in(MemNode::Memory);
Node* value = can_see_stored_value(mem,phase);
if( value && !phase->type(value)->higher_equal( _type ) )
--- a/hotspot/src/share/vm/opto/memnode.hpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/memnode.hpp Mon Jan 26 16:22:12 2009 +0100
@@ -207,11 +207,11 @@
virtual BasicType memory_type() const { return T_BYTE; }
};
-//------------------------------LoadCNode--------------------------------------
-// Load a char (16bits unsigned) from memory
-class LoadCNode : public LoadNode {
+//------------------------------LoadUSNode-------------------------------------
+// Load an unsigned short/char (16bits unsigned) from memory
+class LoadUSNode : public LoadNode {
public:
- LoadCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
+ LoadUSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
: LoadNode(c,mem,adr,at,ti) {}
virtual int Opcode() const;
virtual uint ideal_reg() const { return Op_RegI; }
--- a/hotspot/src/share/vm/opto/mulnode.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/mulnode.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -442,7 +442,7 @@
return load;
}
uint lop = load->Opcode();
- if( lop == Op_LoadC &&
+ if( lop == Op_LoadUS &&
con == 0x0000FFFF ) // Already zero-extended
return load;
// Masking off the high bits of a unsigned-shift-right is not
@@ -470,19 +470,19 @@
uint lop = load->Opcode();
// Masking bits off of a Character? Hi bits are already zero.
- if( lop == Op_LoadC &&
+ if( lop == Op_LoadUS &&
(mask & 0xFFFF0000) ) // Can we make a smaller mask?
return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
// Masking bits off of a Short? Loading a Character does some masking
if( lop == Op_LoadS &&
(mask & 0xFFFF0000) == 0 ) {
- Node *ldc = new (phase->C, 3) LoadCNode(load->in(MemNode::Control),
+ Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
load->in(MemNode::Memory),
load->in(MemNode::Address),
load->adr_type());
- ldc = phase->transform(ldc);
- return new (phase->C, 3) AndINode(ldc,phase->intcon(mask&0xFFFF));
+ ldus = phase->transform(ldus);
+ return new (phase->C, 3) AndINode(ldus, phase->intcon(mask&0xFFFF));
}
// Masking sign bits off of a Byte? Let the matcher use an unsigned load
@@ -913,7 +913,7 @@
set_req(2, phase->intcon(0));
return this;
}
- else if( ld->Opcode() == Op_LoadC )
+ else if( ld->Opcode() == Op_LoadUS )
// Replace zero-extension-load with sign-extension-load
return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
ld->in(MemNode::Memory),
--- a/hotspot/src/share/vm/opto/superword.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/superword.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -1444,7 +1444,7 @@
// (Start, end] half-open range defining which operands are vector
void SuperWord::vector_opd_range(Node* n, uint* start, uint* end) {
switch (n->Opcode()) {
- case Op_LoadB: case Op_LoadC:
+ case Op_LoadB: case Op_LoadUS:
case Op_LoadI: case Op_LoadL:
case Op_LoadF: case Op_LoadD:
case Op_LoadP:
--- a/hotspot/src/share/vm/opto/vectornode.cpp Wed Jan 21 11:18:38 2009 -0800
+++ b/hotspot/src/share/vm/opto/vectornode.cpp Mon Jan 26 16:22:12 2009 +0100
@@ -239,7 +239,7 @@
return Op_XorV;
case Op_LoadB:
- case Op_LoadC:
+ case Op_LoadUS:
case Op_LoadS:
case Op_LoadI:
case Op_LoadL:
@@ -269,7 +269,7 @@
case 16: return Op_Load16B;
}
break;
- case Op_LoadC:
+ case Op_LoadUS:
switch (vlen) {
case 2: return Op_Load2C;
case 4: return Op_Load4C;