# HG changeset patch
# User phedlin
# Date 1524571142 -7200
# Node ID e4d7fcab43d787a6f3338efc2d13ae7b1959f22b
# Parent  d4cae08239f7bd2bbfbc4889afead97d0661ee53
8233498: Remove dead code.
Reviewed-by: neliasso

diff -r d4cae08239f7 -r e4d7fcab43d7 src/hotspot/cpu/sparc/c1_MacroAssembler_sparc.cpp
--- a/src/hotspot/cpu/sparc/c1_MacroAssembler_sparc.cpp	Mon Nov 11 14:47:37 2019 +0100
+++ b/src/hotspot/cpu/sparc/c1_MacroAssembler_sparc.cpp	Tue Apr 24 13:59:02 2018 +0200
@@ -66,9 +66,9 @@
 
 
 void C1_MacroAssembler::verified_entry() {
-  if (C1Breakpoint) breakpoint_trap();
-  // build frame
-  verify_FPU(0, "method_entry");
+  if (C1Breakpoint) {
+    breakpoint_trap();
+  }
 }
 
 
diff -r d4cae08239f7 -r e4d7fcab43d7 src/hotspot/cpu/sparc/interp_masm_sparc.cpp
--- a/src/hotspot/cpu/sparc/interp_masm_sparc.cpp	Mon Nov 11 14:47:37 2019 +0100
+++ b/src/hotspot/cpu/sparc/interp_masm_sparc.cpp	Tue Apr 24 13:59:02 2018 +0200
@@ -91,7 +91,6 @@
 // dispatch.
 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
   assert_not_delayed();
-  verify_FPU(1, state);
   interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
   jmp( IdispatchAddress, 0 );
   if (bcp_incr != 0)  delayed()->inc(Lbcp, bcp_incr);
@@ -264,7 +263,6 @@
 // dispatch value in Lbyte_code and increment Lbcp
 
 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify, bool generate_poll) {
-  verify_FPU(1, state);
   // %%%%% maybe implement +VerifyActivationFrameSize here
   //verify_thread(); //too slow; we will just verify on method entry & exit
   if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
@@ -2545,11 +2543,6 @@
 }
 
 
-void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
-  if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
-}
-
-
 // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
 void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
                                                         int increment, Address mask_addr,
diff -r d4cae08239f7 -r e4d7fcab43d7 src/hotspot/cpu/sparc/interp_masm_sparc.hpp
--- a/src/hotspot/cpu/sparc/interp_masm_sparc.hpp	Mon Nov 11 14:47:37 2019 +0100
+++ b/src/hotspot/cpu/sparc/interp_masm_sparc.hpp	Tue Apr 24 13:59:02 2018 +0200
@@ -321,7 +321,6 @@
   // Debugging
   void interp_verify_oop(Register reg, TosState state, const char * file, int line);    // only if +VerifyOops && state == atos
   void verify_oop_or_return_address(Register reg, Register rtmp); // for astore
-  void verify_FPU(int stack_depth, TosState state = ftos); // only if +VerifyFPU  && (state == ftos || state == dtos)
 
   // support for JVMTI/Dtrace
   typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode;
diff -r d4cae08239f7 -r e4d7fcab43d7 src/hotspot/cpu/sparc/macroAssembler_sparc.cpp
--- a/src/hotspot/cpu/sparc/macroAssembler_sparc.cpp	Mon Nov 11 14:47:37 2019 +0100
+++ b/src/hotspot/cpu/sparc/macroAssembler_sparc.cpp	Tue Apr 24 13:59:02 2018 +0200
@@ -1130,21 +1130,6 @@
   }
 }
 
-
-// pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
-void MacroAssembler::push_fTOS() {
-  // %%%%%% need to implement this
-}
-
-// pops double TOS element from CPU stack and pushes on FPU stack
-void MacroAssembler::pop_fTOS() {
-  // %%%%%% need to implement this
-}
-
-void MacroAssembler::empty_FPU_stack() {
-  // %%%%%% need to implement this
-}
-
 void MacroAssembler::_verify_oop(Register reg, const char* msg, const char * file, int line) {
   // plausibility check for oops
   if (!VerifyOops) return;
@@ -2826,47 +2811,6 @@
    bind(done);
 }
 
-
-
-void MacroAssembler::print_CPU_state() {
-  // %%%%% need to implement this
-}
-
-void MacroAssembler::verify_FPU(int stack_depth, const char* s) {
-  // %%%%% need to implement this
-}
-
-void MacroAssembler::push_IU_state() {
-  // %%%%% need to implement this
-}
-
-
-void MacroAssembler::pop_IU_state() {
-  // %%%%% need to implement this
-}
-
-
-void MacroAssembler::push_FPU_state() {
-  // %%%%% need to implement this
-}
-
-
-void MacroAssembler::pop_FPU_state() {
-  // %%%%% need to implement this
-}
-
-
-void MacroAssembler::push_CPU_state() {
-  // %%%%% need to implement this
-}
-
-
-void MacroAssembler::pop_CPU_state() {
-  // %%%%% need to implement this
-}
-
-
-
 void MacroAssembler::verify_tlab() {
 #ifdef ASSERT
   if (UseTLAB && VerifyOops) {
diff -r d4cae08239f7 -r e4d7fcab43d7 src/hotspot/cpu/sparc/macroAssembler_sparc.hpp
--- a/src/hotspot/cpu/sparc/macroAssembler_sparc.hpp	Mon Nov 11 14:47:37 2019 +0100
+++ b/src/hotspot/cpu/sparc/macroAssembler_sparc.hpp	Tue Apr 24 13:59:02 2018 +0200
@@ -649,10 +649,6 @@
   inline void callr( Register s1, Register s2 );
   inline void callr( Register s1, int simm13a, RelocationHolder const& rspec = RelocationHolder() );
 
-  // Emits nothing on V8
-  inline void iprefetch( address d, relocInfo::relocType rt = relocInfo::none );
-  inline void iprefetch( Label& L);
-
   inline void tst( Register s );
 
   inline void ret(  bool trace = false );
@@ -1056,23 +1052,6 @@
   // check_and_forward_exception to handle exceptions when it is safe
   void check_and_forward_exception(Register scratch_reg);
 
-  // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
-  void push_fTOS();
-
-  // pops double TOS element from CPU stack and pushes on FPU stack
-  void pop_fTOS();
-
-  void empty_FPU_stack();
-
-  void push_IU_state();
-  void pop_IU_state();
-
-  void push_FPU_state();
-  void pop_FPU_state();
-
-  void push_CPU_state();
-  void pop_CPU_state();
-
   // Returns the byte size of the instructions generated by decode_klass_not_null().
   static int instr_size_for_decode_klass_not_null();
 
@@ -1092,15 +1071,11 @@
 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 
-        // only if +VerifyOops
-  void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
-        // only if +VerifyFPU
   void stop(const char* msg);                          // prints msg, dumps registers and stops execution
   void warn(const char* msg);                          // prints msg, but don't stop
   void untested(const char* what = "");
   void unimplemented(const char* what = "");
   void should_not_reach_here()                   { stop("should not reach here"); }
-  void print_CPU_state();
 
   // oops in code
   AddressLiteral allocate_oop_address(jobject obj);                          // allocate_index
diff -r d4cae08239f7 -r e4d7fcab43d7 src/hotspot/cpu/sparc/macroAssembler_sparc.inline.hpp
--- a/src/hotspot/cpu/sparc/macroAssembler_sparc.inline.hpp	Mon Nov 11 14:47:37 2019 +0100
+++ b/src/hotspot/cpu/sparc/macroAssembler_sparc.inline.hpp	Tue Apr 24 13:59:02 2018 +0200
@@ -278,13 +278,6 @@
 inline void MacroAssembler::callr( Register s1, Register s2 ) { jmpl( s1, s2, O7 ); }
 inline void MacroAssembler::callr( Register s1, int simm13a, RelocationHolder const& rspec ) { jmpl( s1, simm13a, O7, rspec); }
 
-// prefetch instruction
-inline void MacroAssembler::iprefetch( address d, relocInfo::relocType rt ) {
-  Assembler::bp( never, true, xcc, pt, d, rt );
-    Assembler::bp( never, true, xcc, pt, d, rt );
-}
-inline void MacroAssembler::iprefetch( Label& L) { iprefetch( target(L) ); }
-
 inline void MacroAssembler::tst( Register s ) { orcc( G0, s, G0 ); }
 
 inline void MacroAssembler::ret( bool trace ) {