# HG changeset patch
# User bulasevich
# Date 1571921210 -10800
# Node ID d6206dda2e2887cb5aa1ae37f542985a6430a191
# Parent  3acc15789ca308635773773c75d0b5f2016a9d62
8231952: ARM32: Wrong assumption in assertion in LIRGenerator::atomic_xchg and LIRGenerator::atomic_add
Reviewed-by: dlong, shade
Contributed-by: christoph.goettschkes@microdoc.com

diff -r 3acc15789ca3 -r d6206dda2e28 src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp
--- a/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp	Thu Oct 24 11:54:33 2019 +0100
+++ b/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp	Thu Oct 24 15:46:50 2019 +0300
@@ -774,7 +774,7 @@
   bool is_oop = type == T_OBJECT || type == T_ARRAY;
   LIR_Opr result = new_register(type);
   value.load_item();
-  assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
+  assert(type == T_INT || is_oop || (type == T_LONG && VM_Version::supports_ldrexd()), "unexpected type");
   LIR_Opr tmp = (UseCompressedOops && is_oop) ? new_pointer_register() : LIR_OprFact::illegalOpr;
   __ xchg(addr, value.result(), result, tmp);
   return result;
@@ -783,7 +783,7 @@
 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
   LIR_Opr result = new_register(type);
   value.load_item();
-  assert(type == T_INT LP64_ONLY( || type == T_LONG), "unexpected type");
+  assert(type == T_INT || (type == T_LONG && VM_Version::supports_ldrexd ()), "unexpected type");
   LIR_Opr tmp = new_register(type);
   __ xadd(addr, value.result(), result, tmp);
   return result;