# HG changeset patch
# User dlong
# Date 1545071767 28800
# Node ID 5da72d7e0e80278288f7d145901a942c2f221185
# Parent  7aa1a37b04a2c6b5c2070cccc970275567d38692
8214512: ARM32: Jtreg test compiler/c2/Test8062950.java fails on ARM
Reviewed-by: dlong, enevill, bulasevich
Contributed-by: nick.gasson@arm.com

diff -r 7aa1a37b04a2 -r 5da72d7e0e80 src/hotspot/cpu/arm/arm.ad
--- a/src/hotspot/cpu/arm/arm.ad	Mon Dec 17 16:55:17 2018 +0100
+++ b/src/hotspot/cpu/arm/arm.ad	Mon Dec 17 10:36:07 2018 -0800
@@ -8945,9 +8945,10 @@
 instruct cmpFastLock(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2, iRegP scratch )
 %{
   match(Set pcc (FastLock object box));
+  predicate(!(UseBiasedLocking && !UseOptoBiasInlining));
 
   effect(TEMP scratch, TEMP scratch2);
-  ins_cost(100);
+  ins_cost(DEFAULT_COST*3);
 
   format %{ "FASTLOCK  $object, $box; KILL $scratch, $scratch2" %}
   ins_encode %{
@@ -8956,6 +8957,21 @@
   ins_pipe(long_memory_op);
 %}
 
+instruct cmpFastLock_noBiasInline(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2,
+                                  iRegP scratch, iRegP scratch3) %{
+  match(Set pcc (FastLock object box));
+  predicate(UseBiasedLocking && !UseOptoBiasInlining);
+
+  effect(TEMP scratch, TEMP scratch2, TEMP scratch3);
+  ins_cost(DEFAULT_COST*5);
+
+  format %{ "FASTLOCK  $object, $box; KILL $scratch, $scratch2, $scratch3" %}
+  ins_encode %{
+    __ fast_lock($object$$Register, $box$$Register, $scratch$$Register, $scratch2$$Register, $scratch3$$Register);
+  %}
+  ins_pipe(long_memory_op);
+%}
+
 
 instruct cmpFastUnlock(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2, iRegP scratch ) %{
   match(Set pcc (FastUnlock object box));
diff -r 7aa1a37b04a2 -r 5da72d7e0e80 src/hotspot/cpu/arm/macroAssembler_arm.cpp
--- a/src/hotspot/cpu/arm/macroAssembler_arm.cpp	Mon Dec 17 16:55:17 2018 +0100
+++ b/src/hotspot/cpu/arm/macroAssembler_arm.cpp	Mon Dec 17 10:36:07 2018 -0800
@@ -1971,7 +1971,7 @@
 
 
 #ifdef COMPILER2
-void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch, Register Rscratch2)
+void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch, Register Rscratch2, Register scratch3)
 {
   assert(VM_Version::supports_ldrex(), "unsupported, yet?");
 
@@ -1985,11 +1985,13 @@
   Label fast_lock, done;
 
   if (UseBiasedLocking && !UseOptoBiasInlining) {
-    Label failed;
-    biased_locking_enter(Roop, Rmark, Rscratch, false, noreg, done, failed);
-    bind(failed);
+    assert(scratch3 != noreg, "need extra temporary for -XX:-UseOptoBiasInlining");
+    biased_locking_enter(Roop, Rmark, Rscratch, false, scratch3, done, done);
+    // Fall through if lock not biased otherwise branch to done
   }
 
+  // Invariant: Rmark loaded below does not contain biased lock pattern
+
   ldr(Rmark, Address(Roop, oopDesc::mark_offset_in_bytes()));
   tst(Rmark, markOopDesc::unlocked_value);
   b(fast_lock, ne);
@@ -2016,6 +2018,9 @@
 
   bind(done);
 
+  // At this point flags are set as follows:
+  //  EQ -> Success
+  //  NE -> Failure, branch to slow path
 }
 
 void MacroAssembler::fast_unlock(Register Roop, Register Rbox, Register Rscratch, Register Rscratch2)
diff -r 7aa1a37b04a2 -r 5da72d7e0e80 src/hotspot/cpu/arm/macroAssembler_arm.hpp
--- a/src/hotspot/cpu/arm/macroAssembler_arm.hpp	Mon Dec 17 16:55:17 2018 +0100
+++ b/src/hotspot/cpu/arm/macroAssembler_arm.hpp	Mon Dec 17 10:36:07 2018 -0800
@@ -371,10 +371,10 @@
   // lock_reg and obj_reg must be loaded up with the appropriate values.
   // swap_reg must be supplied.
   // tmp_reg must be supplied.
-  // Optional slow case is for implementations (interpreter and C1) which branch to
-  // slow case directly. If slow_case is NULL, then leaves condition
-  // codes set (for C2's Fast_Lock node) and jumps to done label.
-  // Falls through for the fast locking attempt.
+  // Done label is branched to with condition code EQ set if the lock is
+  // biased and we acquired it. Slow case label is branched to with
+  // condition code NE set if the lock is biased but we failed to acquire
+  // it. Otherwise fall through.
   // Returns offset of first potentially-faulting instruction for null
   // check info (currently consumed only by C1). If
   // swap_reg_contains_mark is true then returns -1 as it is assumed
@@ -1073,7 +1073,7 @@
   void restore_default_fp_mode();
 
 #ifdef COMPILER2
-  void fast_lock(Register obj, Register box, Register scratch, Register scratch2);
+  void fast_lock(Register obj, Register box, Register scratch, Register scratch2, Register scratch3 = noreg);
   void fast_unlock(Register obj, Register box, Register scratch, Register scratch2);
 #endif