diff -r 8bea4144b21c -r 9807daeb47c4 src/hotspot/cpu/zero/icache_zero.hpp
--- a/src/hotspot/cpu/zero/icache_zero.hpp	Thu Jan 10 14:32:56 2019 -0500
+++ b/src/hotspot/cpu/zero/icache_zero.hpp	Thu Jan 10 15:13:51 2019 -0500
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2009 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef CPU_ZERO_VM_ICACHE_ZERO_HPP
-#define CPU_ZERO_VM_ICACHE_ZERO_HPP
+#ifndef CPU_ZERO_ICACHE_ZERO_HPP
+#define CPU_ZERO_ICACHE_ZERO_HPP
 
 // Interface for updating the instruction cache.  Whenever the VM
 // modifies code, part of the processor instruction cache potentially
@@ -38,4 +38,4 @@
   static void invalidate_range(address start, int nbytes) {}
 };
 
-#endif // CPU_ZERO_VM_ICACHE_ZERO_HPP
+#endif // CPU_ZERO_ICACHE_ZERO_HPP