diff -r fcad92f425c5 -r 56bf71d64d51 src/hotspot/os_cpu/linux_aarch64/orderAccess_linux_aarch64.hpp --- a/src/hotspot/os_cpu/linux_aarch64/orderAccess_linux_aarch64.hpp Mon Nov 25 14:06:13 2019 +0100 +++ b/src/hotspot/os_cpu/linux_aarch64/orderAccess_linux_aarch64.hpp Mon Nov 25 12:22:13 2019 +0100 @@ -37,6 +37,10 @@ inline void OrderAccess::loadstore() { acquire(); } inline void OrderAccess::storeload() { fence(); } +#define FULL_MEM_BARRIER __sync_synchronize() +#define READ_MEM_BARRIER __atomic_thread_fence(__ATOMIC_ACQUIRE); +#define WRITE_MEM_BARRIER __atomic_thread_fence(__ATOMIC_RELEASE); + inline void OrderAccess::acquire() { READ_MEM_BARRIER; } @@ -51,25 +55,4 @@ inline void OrderAccess::cross_modify_fence() { } -template -struct OrderAccess::PlatformOrderedLoad -{ - template - T operator()(const volatile T* p) const { T data; __atomic_load(const_cast(p), &data, __ATOMIC_ACQUIRE); return data; } -}; - -template -struct OrderAccess::PlatformOrderedStore -{ - template - void operator()(T v, volatile T* p) const { __atomic_store(const_cast(p), &v, __ATOMIC_RELEASE); } -}; - -template -struct OrderAccess::PlatformOrderedStore -{ - template - void operator()(T v, volatile T* p) const { release_store(p, v); fence(); } -}; - #endif // OS_CPU_LINUX_AARCH64_ORDERACCESS_LINUX_AARCH64_HPP