diff -r a48ce92363a9 -r 32eab2eb41fd hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Fri May 06 09:54:58 2016 +0000
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Fri May 06 18:20:50 2016 +0300
@@ -4787,15 +4787,15 @@
   br(rscratch2);
 
   bind(loop);
+  add(base, base, unroll * 16);
   for (int i = -unroll; i < 0; i++)
     stp(value, value, Address(base, i * 16));
   bind(entry);
   subs(cnt, cnt, unroll * 2);
-  add(base, base, unroll * 16);
   br(Assembler::GE, loop);
 
   tbz(cnt, 0, fini);
-  str(value, Address(base, -unroll * 16));
+  str(value, Address(post(base, 8)));
   bind(fini);
 }
 
@@ -4810,6 +4810,7 @@
   Label base_aligned;
 
   assert_different_registers(base, cnt, rscratch1);
+  guarantee(base == r10 && cnt == r11, "fix register usage");
 
   Register tmp = rscratch1;
   Register tmp2 = rscratch2;
@@ -4848,15 +4849,15 @@
   br(tmp2);
 
   bind(small_loop);
+  add(base, base, unroll * 16);
   for (int i = -unroll; i < 0; i++)
     stp(zr, zr, Address(base, i * 16));
   bind(small_table_end);
   subs(cnt, cnt, unroll * 2);
-  add(base, base, unroll * 16);
   br(Assembler::GE, small_loop);
 
   tbz(cnt, 0, done);
-  str(zr, Address(base, -unroll * 16));
+  str(zr, Address(post(base, 8)));
 
   bind(done);
 }