hotspot/src/cpu/x86/vm/globalDefinitions_x86.hpp
author kbarrett
Wed, 15 Feb 2017 22:19:13 -0500
changeset 43964 2f5e556a6037
parent 40015 524230a0f4ca
permissions -rw-r--r--
8166188: G1 Needs pre barrier on dereference of weak JNI handles Summary: Add low tag to jweaks and G1 barrier for jweak loads. Reviewed-by: mgerdin, mdoerr, pliden, dlong, dcubed, coleenp, aph, tschatzl Contributed-by: kim.barrett@oracle.com, martin.doerr@sap.com, volker.simonis@sap.com

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#ifndef CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
#define CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP

const int StackAlignmentInBytes  = 16;

// Indicates whether the C calling conventions require that
// 32-bit integer argument values are extended to 64 bits.
const bool CCallingConventionRequiresIntsAsLongs = false;

#define SUPPORTS_NATIVE_CX8

// The expected size in bytes of a cache line, used to pad data structures.
#if defined(TIERED)
  #ifdef _LP64
    // tiered, 64-bit, large machine
    #define DEFAULT_CACHE_LINE_SIZE 128
  #else
    // tiered, 32-bit, medium machine
    #define DEFAULT_CACHE_LINE_SIZE 64
  #endif
#elif defined(COMPILER1)
  // pure C1, 32-bit, small machine
  // i486 was the last Intel chip with 16-byte cache line size
  #define DEFAULT_CACHE_LINE_SIZE 32
#elif defined(COMPILER2) || defined(SHARK)
  #ifdef _LP64
    // pure C2, 64-bit, large machine
    #define DEFAULT_CACHE_LINE_SIZE 128
  #else
    // pure C2, 32-bit, medium machine
    #define DEFAULT_CACHE_LINE_SIZE 64
  #endif
#endif

#if defined(COMPILER2)
// Include Restricted Transactional Memory lock eliding optimization
#define INCLUDE_RTM_OPT 1
#endif

#if defined(LINUX) || defined(SOLARIS) || defined(__APPLE__)
#define SUPPORT_RESERVED_STACK_AREA
#endif

#endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP