--- a/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp	Mon Jan 22 12:04:12 2018 +0100
+++ b/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp	Fri Jan 19 17:01:34 2018 +0100
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -572,6 +572,8 @@
     if (!ImplicitDiv0Checks) {
       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
+      // Idiv/irem cannot trap (passing info would generate an assertion).
+      info = NULL;
     }
     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
     if (x->op() == Bytecodes::_irem) {