--- a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp	Fri Jun 14 20:30:10 2019 -0700
+++ b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp	Mon Jun 17 15:31:49 2019 +0800
@@ -276,7 +276,7 @@
   unsigned get(int msb = 31, int lsb = 0) {
     int nbits = msb - lsb + 1;
     unsigned mask = ((1U << nbits) - 1) << lsb;
-    assert_cond(bits & mask == mask);
+    assert_cond((bits & mask) == mask);
     return (insn & mask) >> lsb;
   }
 
@@ -2644,7 +2644,7 @@
   // RBIT only allows T8B and T16B but encodes them oddly.  Argh...
   void rbit(FloatRegister Vd, SIMD_Arrangement T, FloatRegister Vn) {
     assert((ASSERTION), MSG);
-    _rbit(Vd, SIMD_Arrangement(T & 1 | 0b010), Vn);
+    _rbit(Vd, SIMD_Arrangement((T & 1) | 0b010), Vn);
   }
 #undef ASSERTION