src/hotspot/cpu/x86/x86_32.ad
changeset 49452 acb36277a784
parent 49027 8dc742d9bbab
child 50534 a6a44177f99c
--- a/src/hotspot/cpu/x86/x86_32.ad	Fri Mar 16 22:59:32 2018 -0700
+++ b/src/hotspot/cpu/x86/x86_32.ad	Thu Mar 15 21:26:55 2018 +0100
@@ -391,7 +391,7 @@
         int format) {
 #ifdef ASSERT
   if (rspec.reloc()->type() == relocInfo::oop_type && d32 != 0 && d32 != (int)Universe::non_oop_word()) {
-    assert(oopDesc::is_oop(cast_to_oop(d32)) && (ScavengeRootsInCode || !cast_to_oop(d32)->is_scavengable()), "cannot embed scavengable oops in code");
+    assert(oopDesc::is_oop(cast_to_oop(d32)) && (ScavengeRootsInCode || !Universe::heap()->is_scavengable(cast_to_oop(d32))), "cannot embed scavengable oops in code");
   }
 #endif
   cbuf.relocate(cbuf.insts_mark(), rspec, format);
@@ -786,7 +786,7 @@
   }
   if (cbuf) {
     MacroAssembler _masm(cbuf);
-    // EVEX spills remain EVEX: Compressed displacemement is better than AVX on spill mem operations, 
+    // EVEX spills remain EVEX: Compressed displacemement is better than AVX on spill mem operations,
     //                          it maps more cases to single byte displacement
     _masm.set_managed();
     if (reg_lo+1 == reg_hi) { // double move?
@@ -976,7 +976,7 @@
     dst_offset_size = (tmp_dst_offset == 0) ? 0 : ((tmp_dst_offset < 0x80) ? 1 : 4);
     calc_size += 3+src_offset_size + 3+dst_offset_size;
     break;
-  }   
+  }
   case Op_VecX:
   case Op_VecY:
   case Op_VecZ: