--- a/src/hotspot/cpu/x86/assembler_x86.hpp Thu Oct 17 20:27:44 2019 +0100
+++ b/src/hotspot/cpu/x86/assembler_x86.hpp Thu Oct 17 20:53:35 2019 +0100
@@ -968,6 +968,9 @@
void aesenc(XMMRegister dst, XMMRegister src);
void aesenclast(XMMRegister dst, Address src);
void aesenclast(XMMRegister dst, XMMRegister src);
+ // Vector AES instructions
+ void vaesenc(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
+ void vaesenclast(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
void vaesdec(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
void vaesdeclast(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
@@ -1025,6 +1028,8 @@
void cld();
void clflush(Address adr);
+ void clflushopt(Address adr);
+ void clwb(Address adr);
void cmovl(Condition cc, Register dst, Register src);
void cmovl(Condition cc, Register dst, Address src);
@@ -1401,6 +1406,7 @@
}
void mfence();
+ void sfence();
// Moves
@@ -1850,6 +1856,9 @@
void sqrtsd(XMMRegister dst, Address src);
void sqrtsd(XMMRegister dst, XMMRegister src);
+ void roundsd(XMMRegister dst, Address src, int32_t rmode);
+ void roundsd(XMMRegister dst, XMMRegister src, int32_t rmode);
+
// Compute Square Root of Scalar Single-Precision Floating-Point Value
void sqrtss(XMMRegister dst, Address src);
void sqrtss(XMMRegister dst, XMMRegister src);
@@ -2014,6 +2023,12 @@
void vsqrtps(XMMRegister dst, XMMRegister src, int vector_len);
void vsqrtps(XMMRegister dst, Address src, int vector_len);
+ // Round Packed Double precision value.
+ void vroundpd(XMMRegister dst, XMMRegister src, int32_t rmode, int vector_len);
+ void vroundpd(XMMRegister dst, Address src, int32_t rmode, int vector_len);
+ void vrndscalepd(XMMRegister dst, XMMRegister src, int32_t rmode, int vector_len);
+ void vrndscalepd(XMMRegister dst, Address src, int32_t rmode, int vector_len);
+
// Bitwise Logical AND of Packed Floating-Point Values
void andpd(XMMRegister dst, XMMRegister src);
void andps(XMMRegister dst, XMMRegister src);