--- a/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp Thu Oct 17 20:27:44 2019 +0100
+++ b/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp Thu Oct 17 20:53:35 2019 +0100
@@ -1,6 +1,6 @@
/*
- * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2016, 2017, SAP SE. All rights reserved.
+ * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2016, 2019, SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -81,6 +81,21 @@
return offset;
}
+void LIR_Assembler::clinit_barrier(ciMethod* method) {
+ assert(!method->holder()->is_not_initialized(), "initialization should have been started");
+
+ Label L_skip_barrier;
+ Register klass = Z_R1_scratch;
+
+ metadata2reg(method->holder()->constant_encoding(), klass);
+ __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/);
+
+ __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub());
+ __ z_br(klass);
+
+ __ bind(L_skip_barrier);
+}
+
void LIR_Assembler::osr_entry() {
// On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
//
@@ -957,6 +972,7 @@
} else {
__ z_lg(dest->as_register(), disp_value, disp_reg, src);
}
+ __ verify_oop(dest->as_register());
break;
}
case T_FLOAT:
@@ -976,9 +992,6 @@
case T_LONG : __ z_lg(dest->as_register_lo(), disp_value, disp_reg, src); break;
default : ShouldNotReachHere();
}
- if (type == T_ARRAY || type == T_OBJECT) {
- __ verify_oop(dest->as_register());
- }
if (patch != NULL) {
patching_epilog(patch, patch_code, src, info);
@@ -991,7 +1004,7 @@
assert(dest->is_register(), "should not call otherwise");
if (dest->is_single_cpu()) {
- if (type == T_ARRAY || type == T_OBJECT) {
+ if (is_reference_type(type)) {
__ mem2reg_opt(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix()), true);
__ verify_oop(dest->as_register());
} else if (type == T_METADATA) {
@@ -1019,7 +1032,7 @@
if (src->is_single_cpu()) {
const Address dst = frame_map()->address_for_slot(dest->single_stack_ix());
- if (type == T_OBJECT || type == T_ARRAY) {
+ if (is_reference_type(type)) {
__ verify_oop(src->as_register());
__ reg2mem_opt(src->as_register(), dst, true);
} else if (type == T_METADATA) {
@@ -1065,7 +1078,7 @@
} else {
ShouldNotReachHere();
}
- if (to_reg->type() == T_OBJECT || to_reg->type() == T_ARRAY) {
+ if (is_reference_type(to_reg->type())) {
__ verify_oop(to_reg->as_register());
}
}
@@ -1116,7 +1129,7 @@
assert(disp_reg != Z_R0 || Immediate::is_simm20(disp_value), "should have set this up");
- if (type == T_ARRAY || type == T_OBJECT) {
+ if (is_reference_type(type)) {
__ verify_oop(from->as_register());
}
@@ -1279,10 +1292,10 @@
Register reg1 = opr1->as_register();
if (opr2->is_single_cpu()) {
// cpu register - cpu register
- if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) {
+ if (is_reference_type(opr1->type())) {
__ z_clgr(reg1, opr2->as_register());
} else {
- assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "cmp int, oop?");
+ assert(!is_reference_type(opr2->type()), "cmp int, oop?");
if (unsigned_comp) {
__ z_clr(reg1, opr2->as_register());
} else {
@@ -1291,7 +1304,7 @@
}
} else if (opr2->is_stack()) {
// cpu register - stack
- if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) {
+ if (is_reference_type(opr1->type())) {
__ z_cg(reg1, frame_map()->address_for_slot(opr2->single_stack_ix()));
} else {
if (unsigned_comp) {
@@ -1309,7 +1322,7 @@
} else {
__ z_cfi(reg1, c->as_jint());
}
- } else if (c->type() == T_OBJECT || c->type() == T_ARRAY) {
+ } else if (is_reference_type(c->type())) {
// In 64bit oops are single register.
jobject o = c->as_jobject();
if (o == NULL) {
@@ -1752,7 +1765,7 @@
}
} else {
Register r_lo;
- if (right->type() == T_OBJECT || right->type() == T_ARRAY) {
+ if (is_reference_type(right->type())) {
r_lo = right->as_register();
} else {
r_lo = right->as_register_lo();
@@ -1970,7 +1983,6 @@
return;
}
- Label done;
// Save outgoing arguments in callee saved registers (C convention) in case
// a call to System.arraycopy is needed.
Register callee_saved_src = Z_R10;
@@ -2142,7 +2154,7 @@
store_parameter(src_klass, 0); // sub
store_parameter(dst_klass, 1); // super
emit_call_c(Runtime1::entry_for (Runtime1::slow_subtype_check_id));
- CHECK_BAILOUT();
+ CHECK_BAILOUT2(cont, slow);
// Sets condition code 0 for match (2 otherwise).
__ branch_optimized(Assembler::bcondEqual, cont);
@@ -2201,7 +2213,7 @@
__ z_lg(Z_ARG5, Address(Z_ARG5, ObjArrayKlass::element_klass_offset()));
__ z_lg(Z_ARG4, Address(Z_ARG5, Klass::super_check_offset_offset()));
emit_call_c(copyfunc_addr);
- CHECK_BAILOUT();
+ CHECK_BAILOUT2(cont, slow);
#ifndef PRODUCT
if (PrintC1Statistics) {
@@ -2399,8 +2411,8 @@
__ move_reg_if_needed(len, T_LONG, len, T_INT); // sign extend
if (UseSlowPath ||
- (!UseFastNewObjectArray && (op->type() == T_OBJECT || op->type() == T_ARRAY)) ||
- (!UseFastNewTypeArray && (op->type() != T_OBJECT && op->type() != T_ARRAY))) {
+ (!UseFastNewObjectArray && (is_reference_type(op->type()))) ||
+ (!UseFastNewTypeArray && (!is_reference_type(op->type())))) {
__ z_brul(*op->stub()->entry());
} else {
__ allocate_array(op->obj()->as_register(),
@@ -2556,7 +2568,7 @@
store_parameter(klass_RInfo, 0); // sub
store_parameter(k_RInfo, 1); // super
emit_call_c(a); // Sets condition code 0 for match (2 otherwise).
- CHECK_BAILOUT();
+ CHECK_BAILOUT2(profile_cast_failure, profile_cast_success);
__ branch_optimized(Assembler::bcondNotEqual, *failure_target);
// Fall through to success case.
}
@@ -2639,7 +2651,7 @@
store_parameter(klass_RInfo, 0); // sub
store_parameter(k_RInfo, 1); // super
emit_call_c(a); // Sets condition code 0 for match (2 otherwise).
- CHECK_BAILOUT();
+ CHECK_BAILOUT3(profile_cast_success, profile_cast_failure, done);
__ branch_optimized(Assembler::bcondNotEqual, *failure_target);
// Fall through to success case.