--- a/src/hotspot/cpu/s390/icache_s390.hpp Thu Jan 10 14:32:56 2019 -0500
+++ b/src/hotspot/cpu/s390/icache_s390.hpp Thu Jan 10 15:13:51 2019 -0500
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2016 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@@ -23,8 +23,8 @@
*
*/
-#ifndef CPU_S390_VM_ICACHE_S390_HPP
-#define CPU_S390_VM_ICACHE_S390_HPP
+#ifndef CPU_S390_ICACHE_S390_HPP
+#define CPU_S390_ICACHE_S390_HPP
// Interface for updating the instruction cache. Whenever the VM modifies
// code, part of the processor instruction cache potentially has to be flushed.
@@ -41,4 +41,4 @@
// Use default implementation.
};
-#endif // CPU_S390_VM_ICACHE_S390_HPP
+#endif // CPU_S390_ICACHE_S390_HPP