hotspot/src/cpu/x86/vm/c1_Defs_x86.hpp
changeset 1066 717c3345024f
parent 1 489c9b5090e2
child 1217 5eb97f366a6a
--- a/hotspot/src/cpu/x86/vm/c1_Defs_x86.hpp	Tue Aug 26 15:49:40 2008 -0700
+++ b/hotspot/src/cpu/x86/vm/c1_Defs_x86.hpp	Wed Aug 27 00:21:55 2008 -0700
@@ -36,27 +36,34 @@
 
 // registers
 enum {
-  pd_nof_cpu_regs_frame_map = 8,  // number of registers used during code emission
-  pd_nof_fpu_regs_frame_map = 8,  // number of registers used during code emission
-  pd_nof_xmm_regs_frame_map = 8,  // number of registers used during code emission
-  pd_nof_caller_save_cpu_regs_frame_map = 6,  // number of registers killed by calls
-  pd_nof_caller_save_fpu_regs_frame_map = 8,  // number of registers killed by calls
-  pd_nof_caller_save_xmm_regs_frame_map = 8,  // number of registers killed by calls
+  pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers,       // number of registers used during code emission
+  pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers,  // number of registers used during code emission
+  pd_nof_xmm_regs_frame_map = XMMRegisterImpl::number_of_registers,    // number of registers used during code emission
 
-  pd_nof_cpu_regs_reg_alloc = 6,  // number of registers that are visible to register allocator
+#ifdef _LP64
+  #define UNALLOCATED 4    // rsp, rbp, r15, r10
+#else
+  #define UNALLOCATED 2    // rsp, rbp
+#endif // LP64
+
+  pd_nof_caller_save_cpu_regs_frame_map = pd_nof_cpu_regs_frame_map - UNALLOCATED,  // number of registers killed by calls
+  pd_nof_caller_save_fpu_regs_frame_map = pd_nof_fpu_regs_frame_map,  // number of registers killed by calls
+  pd_nof_caller_save_xmm_regs_frame_map = pd_nof_xmm_regs_frame_map,  // number of registers killed by calls
+
+  pd_nof_cpu_regs_reg_alloc = pd_nof_caller_save_cpu_regs_frame_map,  // number of registers that are visible to register allocator
   pd_nof_fpu_regs_reg_alloc = 6,  // number of registers that are visible to register allocator
 
-  pd_nof_cpu_regs_linearscan = 8, // number of registers visible to linear scan
-  pd_nof_fpu_regs_linearscan = 8, // number of registers visible to linear scan
-  pd_nof_xmm_regs_linearscan = 8, // number of registers visible to linear scan
+  pd_nof_cpu_regs_linearscan = pd_nof_cpu_regs_frame_map, // number of registers visible to linear scan
+  pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan
+  pd_nof_xmm_regs_linearscan = pd_nof_xmm_regs_frame_map, // number of registers visible to linear scan
   pd_first_cpu_reg = 0,
-  pd_last_cpu_reg = 5,
+  pd_last_cpu_reg = NOT_LP64(5) LP64_ONLY(11),
   pd_first_byte_reg = 2,
   pd_last_byte_reg = 5,
   pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
   pd_last_fpu_reg =  pd_first_fpu_reg + 7,
   pd_first_xmm_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map,
-  pd_last_xmm_reg =  pd_first_xmm_reg + 7
+  pd_last_xmm_reg =  pd_first_xmm_reg + pd_nof_xmm_regs_frame_map - 1
 };