--- a/hotspot/src/share/vm/opto/regmask.hpp Thu Jun 14 14:59:52 2012 -0700
+++ b/hotspot/src/share/vm/opto/regmask.hpp Fri Jun 15 01:25:19 2012 -0700
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -113,7 +113,11 @@
// the controlling alignment constraint. Note that this alignment
// requirement is internal to the allocator, and independent of any
// particular platform.
- enum { SlotsPerLong = 2 };
+ enum { SlotsPerLong = 2,
+ SlotsPerVecS = 1,
+ SlotsPerVecD = 2,
+ SlotsPerVecX = 4,
+ SlotsPerVecY = 8 };
// A constructor only used by the ADLC output. All mask fields are filled
// in directly. Calls to this look something like RM(1,2,3,4);
@@ -193,20 +197,53 @@
OptoReg::Name find_first_pair() const;
// Clear out partial bits; leave only aligned adjacent bit pairs.
- void ClearToPairs();
+ void clear_to_pairs();
// Smear out partial bits; leave only aligned adjacent bit pairs.
- void SmearToPairs();
+ void smear_to_pairs();
// Verify that the mask contains only aligned adjacent bit pairs
- void VerifyPairs() const { assert( is_aligned_Pairs(), "mask is not aligned, adjacent pairs" ); }
+ void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); }
// Test that the mask contains only aligned adjacent bit pairs
- bool is_aligned_Pairs() const;
+ bool is_aligned_pairs() const;
// mask is a pair of misaligned registers
- bool is_misaligned_Pair() const { return Size()==2 && !is_aligned_Pairs();}
+ bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); }
// Test for single register
int is_bound1() const;
// Test for a single adjacent pair
- int is_bound2() const;
+ int is_bound_pair() const;
+ // Test for a single adjacent set of ideal register's size.
+ int is_bound(uint ireg) const {
+ if (is_vector(ireg)) {
+ if (is_bound_set(num_registers(ireg)))
+ return true;
+ } else if (is_bound1() || is_bound_pair()) {
+ return true;
+ }
+ return false;
+ }
+
+ // Find the lowest-numbered register set in the mask. Return the
+ // HIGHEST register number in the set, or BAD if no sets.
+ // Assert that the mask contains only bit sets.
+ OptoReg::Name find_first_set(int size) const;
+
+ // Clear out partial bits; leave only aligned adjacent bit sets of size.
+ void clear_to_sets(int size);
+ // Smear out partial bits to aligned adjacent bit sets.
+ void smear_to_sets(int size);
+ // Verify that the mask contains only aligned adjacent bit sets
+ void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
+ // Test that the mask contains only aligned adjacent bit sets
+ bool is_aligned_sets(int size) const;
+
+ // mask is a set of misaligned registers
+ bool is_misaligned_set(int size) const { return (int)Size()==size && !is_aligned_sets(size);}
+
+ // Test for a single adjacent set
+ int is_bound_set(int size) const;
+
+ static bool is_vector(uint ireg);
+ static int num_registers(uint ireg);
// Fast overlap test. Non-zero if any registers in common.
int overlap( const RegMask &rm ) const {
@@ -280,9 +317,15 @@
static bool can_represent(OptoReg::Name reg) {
// NOTE: -1 in computation reflects the usage of the last
- // bit of the regmask as an infinite stack flag.
+ // bit of the regmask as an infinite stack flag and
+ // -7 is to keep mask aligned for largest value (VecY).
return (int)reg < (int)(CHUNK_SIZE-1);
}
+ static bool can_represent_arg(OptoReg::Name reg) {
+ // NOTE: -SlotsPerVecY in computation reflects the need
+ // to keep mask aligned for largest value (VecY).
+ return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecY);
+ }
};
// Do not use this constant directly in client code!